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Issue 7068002: MIPS: Fixed two bugs related to double function calls. (Closed)
Patch Set: Created 9 years, 7 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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2644 } 2644 }
2645 lw(scratch, FieldMemOperand(obj, HeapObject::kMapOffset)); 2645 lw(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
2646 LoadRoot(at, index); 2646 LoadRoot(at, index);
2647 Branch(fail, ne, scratch, Operand(at)); 2647 Branch(fail, ne, scratch, Operand(at));
2648 } 2648 }
2649 2649
2650 2650
2651 void MacroAssembler::GetCFunctionDoubleResult(const DoubleRegister dst) { 2651 void MacroAssembler::GetCFunctionDoubleResult(const DoubleRegister dst) {
2652 CpuFeatures::Scope scope(FPU); 2652 CpuFeatures::Scope scope(FPU);
2653 if (IsMipsSoftFloatABI) { 2653 if (IsMipsSoftFloatABI) {
2654 Move(v0, v1, dst); 2654 Move(dst, v0, v1);
2655 } else { 2655 } else {
2656 Move(f0, dst); // Reg f0 is o32 ABI FP return value. 2656 Move(dst, f0); // Reg f0 is o32 ABI FP return value.
2657 } 2657 }
2658 } 2658 }
2659 2659
2660 2660
2661 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg) { 2661 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg) {
2662 CpuFeatures::Scope scope(FPU); 2662 CpuFeatures::Scope scope(FPU);
2663 if (!IsMipsSoftFloatABI) { 2663 if (!IsMipsSoftFloatABI) {
2664 Move(f12, dreg); 2664 Move(f12, dreg);
2665 } else { 2665 } else {
2666 Move(a0, a1, dreg); 2666 Move(a0, a1, dreg);
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4021 opcode == BGTZL); 4021 opcode == BGTZL);
4022 opcode = (cond == eq) ? BEQ : BNE; 4022 opcode = (cond == eq) ? BEQ : BNE;
4023 instr = (instr & ~kOpcodeMask) | opcode; 4023 instr = (instr & ~kOpcodeMask) | opcode;
4024 masm_.emit(instr); 4024 masm_.emit(instr);
4025 } 4025 }
4026 4026
4027 4027
4028 } } // namespace v8::internal 4028 } } // namespace v8::internal
4029 4029
4030 #endif // V8_TARGET_ARCH_MIPS 4030 #endif // V8_TARGET_ARCH_MIPS
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