Index: src/mips/assembler-mips.cc |
diff --git a/src/mips/assembler-mips.cc b/src/mips/assembler-mips.cc |
index 2e10904cb1aa8724618491861fad37bcc8197cf5..6763b7976ed5547ac6ddd114a157ae0e4bf23838 100644 |
--- a/src/mips/assembler-mips.cc |
+++ b/src/mips/assembler-mips.cc |
@@ -1336,13 +1336,37 @@ void Assembler::lui(Register rd, int32_t j) { |
//-------------Misc-instructions-------------- |
// Break / Trap instructions. |
-void Assembler::break_(uint32_t code) { |
+void Assembler::break_(uint32_t code, bool break_as_stop) { |
ASSERT((code & ~0xfffff) == 0); |
+ // We need to invalidate breaks that could be stops as well because the |
+ // simulator expects a char pointer after the stop instruction. |
+ // See constants-mips.h for explanation. |
+ ASSERT((break_as_stop && |
+ code <= kMaxStopCode && |
+ code > kMaxWatchpointCode) || |
+ (!break_as_stop && |
+ (code > kMaxStopCode || |
+ code <= kMaxWatchpointCode))); |
Instr break_instr = SPECIAL | BREAK | (code << 6); |
emit(break_instr); |
} |
+void Assembler::stop(const char* msg, uint32_t code) { |
+ ASSERT(code > kMaxWatchpointCode); |
+ ASSERT(code <= kMaxStopCode); |
+#if defined(V8_HOST_ARCH_MIPS) |
+ break_(0x54321); |
+#else // V8_HOST_ARCH_MIPS |
+ BlockTrampolinePoolFor(2); |
+ // The Simulator will handle the stop instruction and get the message address. |
+ // On MIPS stop() is just a special kind of break_(). |
+ break_(code, true); |
+ emit(reinterpret_cast<Instr>(msg)); |
+#endif |
+} |
+ |
+ |
void Assembler::tge(Register rs, Register rt, uint16_t code) { |
ASSERT(is_uint10(code)); |
Instr instr = SPECIAL | TGE | rs.code() << kRsShift |