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Side by Side Diff: third_party/tcmalloc/chromium/src/base/atomicops-internals-arm-generic.h

Issue 7050034: Merge google-perftools r109 (the current contents of third_party/tcmalloc/vendor) (Closed) Base URL: svn://svn.chromium.org/chrome/trunk/src/
Patch Set: '' Created 9 years, 6 months ago
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1 // Copyright (c) 2003, Google Inc.
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are
6 // met:
7 //
8 // * Redistributions of source code must retain the above copyright
9 // notice, this list of conditions and the following disclaimer.
10 // * Redistributions in binary form must reproduce the above
11 // copyright notice, this list of conditions and the following disclaimer
12 // in the documentation and/or other materials provided with the
13 // distribution.
14 // * Neither the name of Google Inc. nor the names of its
15 // contributors may be used to endorse or promote products derived from
16 // this software without specific prior written permission.
17 //
18 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 // ---
30 //
31 // Author: Lei Zhang, Sasha Levitskiy
32 //
33 // This file is an internal atomic implementation, use base/atomicops.h instead.
34 //
35 // LinuxKernelCmpxchg and Barrier_AtomicIncrement are from Google Gears.
36
37 #ifndef BASE_ATOMICOPS_INTERNALS_ARM_GENERIC_H_
38 #define BASE_ATOMICOPS_INTERNALS_ARM_GENERIC_H_
39
40 #include <stdio.h>
41 #include <stdlib.h>
42 #include "base/macros.h" // For COMPILE_ASSERT
43 #include "base/port.h" // ATTRIBUTE_WEAK
44
45 typedef int32_t Atomic32;
46
47 namespace base {
48 namespace subtle {
49
50 typedef int64_t Atomic64;
51
52 // 0xffff0fc0 is the hard coded address of a function provided by
53 // the kernel which implements an atomic compare-exchange. On older
54 // ARM architecture revisions (pre-v6) this may be implemented using
55 // a syscall. This address is stable, and in active use (hard coded)
56 // by at least glibc-2.7 and the Android C library.
57 // pLinuxKernelCmpxchg has both acquire and release barrier sematincs.
58 typedef Atomic32 (*LinuxKernelCmpxchgFunc)(Atomic32 old_value,
59 Atomic32 new_value,
60 volatile Atomic32* ptr);
61 LinuxKernelCmpxchgFunc pLinuxKernelCmpxchg ATTRIBUTE_WEAK =
62 (LinuxKernelCmpxchgFunc) 0xffff0fc0;
63
64 typedef void (*LinuxKernelMemoryBarrierFunc)(void);
65 LinuxKernelMemoryBarrierFunc pLinuxKernelMemoryBarrier ATTRIBUTE_WEAK =
66 (LinuxKernelMemoryBarrierFunc) 0xffff0fa0;
67
68
69 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
70 Atomic32 old_value,
71 Atomic32 new_value) {
72 Atomic32 prev_value = *ptr;
73 do {
74 if (!pLinuxKernelCmpxchg(old_value, new_value,
75 const_cast<Atomic32*>(ptr))) {
76 return old_value;
77 }
78 prev_value = *ptr;
79 } while (prev_value == old_value);
80 return prev_value;
81 }
82
83 inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr,
84 Atomic32 new_value) {
85 Atomic32 old_value;
86 do {
87 old_value = *ptr;
88 } while (pLinuxKernelCmpxchg(old_value, new_value,
89 const_cast<Atomic32*>(ptr)));
90 return old_value;
91 }
92
93 inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
94 Atomic32 increment) {
95 for (;;) {
96 // Atomic exchange the old value with an incremented one.
97 Atomic32 old_value = *ptr;
98 Atomic32 new_value = old_value + increment;
99 if (pLinuxKernelCmpxchg(old_value, new_value,
100 const_cast<Atomic32*>(ptr)) == 0) {
101 // The exchange took place as expected.
102 return new_value;
103 }
104 // Otherwise, *ptr changed mid-loop and we need to retry.
105 }
106 }
107
108 inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
109 Atomic32 increment) {
110 return Barrier_AtomicIncrement(ptr, increment);
111 }
112
113 inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
114 Atomic32 old_value,
115 Atomic32 new_value) {
116 return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
117 }
118
119 inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
120 Atomic32 old_value,
121 Atomic32 new_value) {
122 return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
123 }
124
125 inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
126 *ptr = value;
127 }
128
129 inline void MemoryBarrier() {
130 pLinuxKernelMemoryBarrier();
131 }
132
133 inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
134 *ptr = value;
135 MemoryBarrier();
136 }
137
138 inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
139 MemoryBarrier();
140 *ptr = value;
141 }
142
143 inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
144 return *ptr;
145 }
146
147 inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
148 Atomic32 value = *ptr;
149 MemoryBarrier();
150 return value;
151 }
152
153 inline Atomic32 Release_Load(volatile const Atomic32* ptr) {
154 MemoryBarrier();
155 return *ptr;
156 }
157
158
159 // 64-bit versions are not implemented yet.
160
161 inline void NotImplementedFatalError(const char *function_name) {
162 fprintf(stderr, "64-bit %s() not implemented on this platform\n",
163 function_name);
164 abort();
165 }
166
167 inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
168 Atomic64 old_value,
169 Atomic64 new_value) {
170 NotImplementedFatalError("NoBarrier_CompareAndSwap");
171 return 0;
172 }
173
174 inline Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr,
175 Atomic64 new_value) {
176 NotImplementedFatalError("NoBarrier_AtomicExchange");
177 return 0;
178 }
179
180 inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr,
181 Atomic64 increment) {
182 NotImplementedFatalError("NoBarrier_AtomicIncrement");
183 return 0;
184 }
185
186 inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr,
187 Atomic64 increment) {
188 NotImplementedFatalError("Barrier_AtomicIncrement");
189 return 0;
190 }
191
192 inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) {
193 NotImplementedFatalError("NoBarrier_Store");
194 }
195
196 inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) {
197 NotImplementedFatalError("Acquire_Store64");
198 }
199
200 inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
201 NotImplementedFatalError("Release_Store");
202 }
203
204 inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
205 NotImplementedFatalError("NoBarrier_Load");
206 return 0;
207 }
208
209 inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
210 NotImplementedFatalError("Atomic64 Acquire_Load");
211 return 0;
212 }
213
214 inline Atomic64 Release_Load(volatile const Atomic64* ptr) {
215 NotImplementedFatalError("Atomic64 Release_Load");
216 return 0;
217 }
218
219 inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
220 Atomic64 old_value,
221 Atomic64 new_value) {
222 NotImplementedFatalError("Atomic64 Acquire_CompareAndSwap");
223 return 0;
224 }
225
226 inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
227 Atomic64 old_value,
228 Atomic64 new_value) {
229 NotImplementedFatalError("Atomic64 Release_CompareAndSwap");
230 return 0;
231 }
232
233 } // namespace base::subtle
234 } // namespace base
235
236 #endif // BASE_ATOMICOPS_INTERNALS_ARM_GENERIC_H_
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