| Index: src/ia32/assembler-ia32.cc
|
| ===================================================================
|
| --- src/ia32/assembler-ia32.cc (revision 7850)
|
| +++ src/ia32/assembler-ia32.cc (working copy)
|
| @@ -341,7 +341,6 @@
|
| pc_ = buffer_;
|
| reloc_info_writer.Reposition(buffer_ + buffer_size, pc_);
|
|
|
| - last_pc_ = NULL;
|
| #ifdef GENERATED_CODE_COVERAGE
|
| InitCoverageLog();
|
| #endif
|
| @@ -389,7 +388,6 @@
|
| void Assembler::cpuid() {
|
| ASSERT(CpuFeatures::IsEnabled(CPUID));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xA2);
|
| }
|
| @@ -397,35 +395,30 @@
|
|
|
| void Assembler::pushad() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x60);
|
| }
|
|
|
|
|
| void Assembler::popad() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x61);
|
| }
|
|
|
|
|
| void Assembler::pushfd() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x9C);
|
| }
|
|
|
|
|
| void Assembler::popfd() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x9D);
|
| }
|
|
|
|
|
| void Assembler::push(const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (x.is_int8()) {
|
| EMIT(0x6a);
|
| EMIT(x.x_);
|
| @@ -445,14 +438,12 @@
|
|
|
| void Assembler::push(Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x50 | src.code());
|
| }
|
|
|
|
|
| void Assembler::push(const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFF);
|
| emit_operand(esi, src);
|
| }
|
| @@ -460,125 +451,13 @@
|
|
|
| void Assembler::pop(Register dst) {
|
| ASSERT(reloc_info_writer.last_pc() != NULL);
|
| - if (FLAG_peephole_optimization && (reloc_info_writer.last_pc() <= last_pc_)) {
|
| - // (last_pc_ != NULL) is rolled into the above check.
|
| - // If a last_pc_ is set, we need to make sure that there has not been any
|
| - // relocation information generated between the last instruction and this
|
| - // pop instruction.
|
| - byte instr = last_pc_[0];
|
| - if ((instr & ~0x7) == 0x50) {
|
| - int push_reg_code = instr & 0x7;
|
| - if (push_reg_code == dst.code()) {
|
| - pc_ = last_pc_;
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (same reg) eliminated\n", pc_offset());
|
| - }
|
| - } else {
|
| - // Convert 'push src; pop dst' to 'mov dst, src'.
|
| - last_pc_[0] = 0x8b;
|
| - Register src = { push_reg_code };
|
| - EnsureSpace ensure_space(this);
|
| - emit_operand(dst, Operand(src));
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (reg->reg) eliminated\n", pc_offset());
|
| - }
|
| - }
|
| - last_pc_ = NULL;
|
| - return;
|
| - } else if (instr == 0xff) { // push of an operand, convert to a move
|
| - byte op1 = last_pc_[1];
|
| - // Check if the operation is really a push.
|
| - if ((op1 & 0x38) == (6 << 3)) {
|
| - op1 = (op1 & ~0x38) | static_cast<byte>(dst.code() << 3);
|
| - last_pc_[0] = 0x8b;
|
| - last_pc_[1] = op1;
|
| - last_pc_ = NULL;
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (op->reg) eliminated\n", pc_offset());
|
| - }
|
| - return;
|
| - }
|
| - } else if ((instr == 0x89) &&
|
| - (last_pc_[1] == 0x04) &&
|
| - (last_pc_[2] == 0x24)) {
|
| - // 0x71283c 396 890424 mov [esp],eax
|
| - // 0x71283f 399 58 pop eax
|
| - if (dst.is(eax)) {
|
| - // change to
|
| - // 0x710fac 216 83c404 add esp,0x4
|
| - last_pc_[0] = 0x83;
|
| - last_pc_[1] = 0xc4;
|
| - last_pc_[2] = 0x04;
|
| - last_pc_ = NULL;
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (mov-pop) eliminated\n", pc_offset());
|
| - }
|
| - return;
|
| - }
|
| - } else if (instr == 0x6a && dst.is(eax)) { // push of immediate 8 bit
|
| - byte imm8 = last_pc_[1];
|
| - if (imm8 == 0) {
|
| - // 6a00 push 0x0
|
| - // 58 pop eax
|
| - last_pc_[0] = 0x31;
|
| - last_pc_[1] = 0xc0;
|
| - // change to
|
| - // 31c0 xor eax,eax
|
| - last_pc_ = NULL;
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (imm->reg) eliminated\n", pc_offset());
|
| - }
|
| - return;
|
| - } else {
|
| - // 6a00 push 0xXX
|
| - // 58 pop eax
|
| - last_pc_[0] = 0xb8;
|
| - EnsureSpace ensure_space(this);
|
| - if ((imm8 & 0x80) != 0) {
|
| - EMIT(0xff);
|
| - EMIT(0xff);
|
| - EMIT(0xff);
|
| - // change to
|
| - // b8XXffffff mov eax,0xffffffXX
|
| - } else {
|
| - EMIT(0x00);
|
| - EMIT(0x00);
|
| - EMIT(0x00);
|
| - // change to
|
| - // b8XX000000 mov eax,0x000000XX
|
| - }
|
| - last_pc_ = NULL;
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (imm->reg) eliminated\n", pc_offset());
|
| - }
|
| - return;
|
| - }
|
| - } else if (instr == 0x68 && dst.is(eax)) { // push of immediate 32 bit
|
| - // 68XXXXXXXX push 0xXXXXXXXX
|
| - // 58 pop eax
|
| - last_pc_[0] = 0xb8;
|
| - last_pc_ = NULL;
|
| - // change to
|
| - // b8XXXXXXXX mov eax,0xXXXXXXXX
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop (imm->reg) eliminated\n", pc_offset());
|
| - }
|
| - return;
|
| - }
|
| -
|
| - // Other potential patterns for peephole:
|
| - // 0x712716 102 890424 mov [esp], eax
|
| - // 0x712719 105 8b1424 mov edx, [esp]
|
| - }
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x58 | dst.code());
|
| }
|
|
|
|
|
| void Assembler::pop(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x8F);
|
| emit_operand(eax, dst);
|
| }
|
| @@ -586,7 +465,6 @@
|
|
|
| void Assembler::enter(const Immediate& size) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xC8);
|
| emit_w(size);
|
| EMIT(0);
|
| @@ -595,7 +473,6 @@
|
|
|
| void Assembler::leave() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xC9);
|
| }
|
|
|
| @@ -603,7 +480,6 @@
|
| void Assembler::mov_b(Register dst, const Operand& src) {
|
| ASSERT(dst.code() < 4);
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x8A);
|
| emit_operand(dst, src);
|
| }
|
| @@ -611,7 +487,6 @@
|
|
|
| void Assembler::mov_b(const Operand& dst, int8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xC6);
|
| emit_operand(eax, dst);
|
| EMIT(imm8);
|
| @@ -621,7 +496,6 @@
|
| void Assembler::mov_b(const Operand& dst, Register src) {
|
| ASSERT(src.code() < 4);
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x88);
|
| emit_operand(src, dst);
|
| }
|
| @@ -629,7 +503,6 @@
|
|
|
| void Assembler::mov_w(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x8B);
|
| emit_operand(dst, src);
|
| @@ -638,7 +511,6 @@
|
|
|
| void Assembler::mov_w(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x89);
|
| emit_operand(src, dst);
|
| @@ -647,7 +519,6 @@
|
|
|
| void Assembler::mov(Register dst, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xB8 | dst.code());
|
| emit(imm32);
|
| }
|
| @@ -655,7 +526,6 @@
|
|
|
| void Assembler::mov(Register dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xB8 | dst.code());
|
| emit(x);
|
| }
|
| @@ -663,7 +533,6 @@
|
|
|
| void Assembler::mov(Register dst, Handle<Object> handle) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xB8 | dst.code());
|
| emit(handle);
|
| }
|
| @@ -671,7 +540,6 @@
|
|
|
| void Assembler::mov(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x8B);
|
| emit_operand(dst, src);
|
| }
|
| @@ -679,7 +547,6 @@
|
|
|
| void Assembler::mov(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x89);
|
| EMIT(0xC0 | src.code() << 3 | dst.code());
|
| }
|
| @@ -687,7 +554,6 @@
|
|
|
| void Assembler::mov(const Operand& dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xC7);
|
| emit_operand(eax, dst);
|
| emit(x);
|
| @@ -696,7 +562,6 @@
|
|
|
| void Assembler::mov(const Operand& dst, Handle<Object> handle) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xC7);
|
| emit_operand(eax, dst);
|
| emit(handle);
|
| @@ -705,7 +570,6 @@
|
|
|
| void Assembler::mov(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x89);
|
| emit_operand(src, dst);
|
| }
|
| @@ -713,7 +577,6 @@
|
|
|
| void Assembler::movsx_b(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xBE);
|
| emit_operand(dst, src);
|
| @@ -722,7 +585,6 @@
|
|
|
| void Assembler::movsx_w(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xBF);
|
| emit_operand(dst, src);
|
| @@ -731,7 +593,6 @@
|
|
|
| void Assembler::movzx_b(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xB6);
|
| emit_operand(dst, src);
|
| @@ -740,7 +601,6 @@
|
|
|
| void Assembler::movzx_w(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xB7);
|
| emit_operand(dst, src);
|
| @@ -750,7 +610,6 @@
|
| void Assembler::cmov(Condition cc, Register dst, int32_t imm32) {
|
| ASSERT(CpuFeatures::IsEnabled(CMOV));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| UNIMPLEMENTED();
|
| USE(cc);
|
| USE(dst);
|
| @@ -761,7 +620,6 @@
|
| void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) {
|
| ASSERT(CpuFeatures::IsEnabled(CMOV));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| UNIMPLEMENTED();
|
| USE(cc);
|
| USE(dst);
|
| @@ -772,7 +630,6 @@
|
| void Assembler::cmov(Condition cc, Register dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(CMOV));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| // Opcode: 0f 40 + cc /r.
|
| EMIT(0x0F);
|
| EMIT(0x40 + cc);
|
| @@ -782,14 +639,12 @@
|
|
|
| void Assembler::cld() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFC);
|
| }
|
|
|
|
|
| void Assembler::rep_movs() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0xA5);
|
| }
|
| @@ -797,7 +652,6 @@
|
|
|
| void Assembler::rep_stos() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0xAB);
|
| }
|
| @@ -805,14 +659,12 @@
|
|
|
| void Assembler::stos() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xAB);
|
| }
|
|
|
|
|
| void Assembler::xchg(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (src.is(eax) || dst.is(eax)) { // Single-byte encoding.
|
| EMIT(0x90 | (src.is(eax) ? dst.code() : src.code()));
|
| } else {
|
| @@ -824,14 +676,12 @@
|
|
|
| void Assembler::adc(Register dst, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(2, Operand(dst), Immediate(imm32));
|
| }
|
|
|
|
|
| void Assembler::adc(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x13);
|
| emit_operand(dst, src);
|
| }
|
| @@ -839,7 +689,6 @@
|
|
|
| void Assembler::add(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x03);
|
| emit_operand(dst, src);
|
| }
|
| @@ -847,24 +696,7 @@
|
|
|
| void Assembler::add(const Operand& dst, const Immediate& x) {
|
| ASSERT(reloc_info_writer.last_pc() != NULL);
|
| - if (FLAG_peephole_optimization && (reloc_info_writer.last_pc() <= last_pc_)) {
|
| - byte instr = last_pc_[0];
|
| - if ((instr & 0xf8) == 0x50) {
|
| - // Last instruction was a push. Check whether this is a pop without a
|
| - // result.
|
| - if ((dst.is_reg(esp)) &&
|
| - (x.x_ == kPointerSize) && (x.rmode_ == RelocInfo::NONE)) {
|
| - pc_ = last_pc_;
|
| - last_pc_ = NULL;
|
| - if (FLAG_print_peephole_optimization) {
|
| - PrintF("%d push/pop(noreg) eliminated\n", pc_offset());
|
| - }
|
| - return;
|
| - }
|
| - }
|
| - }
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(0, dst, x);
|
| }
|
|
|
| @@ -876,14 +708,12 @@
|
|
|
| void Assembler::and_(Register dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(4, Operand(dst), x);
|
| }
|
|
|
|
|
| void Assembler::and_(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x23);
|
| emit_operand(dst, src);
|
| }
|
| @@ -891,14 +721,12 @@
|
|
|
| void Assembler::and_(const Operand& dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(4, dst, x);
|
| }
|
|
|
|
|
| void Assembler::and_(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x21);
|
| emit_operand(src, dst);
|
| }
|
| @@ -906,7 +734,6 @@
|
|
|
| void Assembler::cmpb(const Operand& op, int8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x80);
|
| emit_operand(edi, op); // edi == 7
|
| EMIT(imm8);
|
| @@ -916,7 +743,6 @@
|
| void Assembler::cmpb(const Operand& dst, Register src) {
|
| ASSERT(src.is_byte_register());
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x38);
|
| emit_operand(src, dst);
|
| }
|
| @@ -925,7 +751,6 @@
|
| void Assembler::cmpb(Register dst, const Operand& src) {
|
| ASSERT(dst.is_byte_register());
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x3A);
|
| emit_operand(dst, src);
|
| }
|
| @@ -934,7 +759,6 @@
|
| void Assembler::cmpw(const Operand& op, Immediate imm16) {
|
| ASSERT(imm16.is_int16());
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x81);
|
| emit_operand(edi, op);
|
| @@ -944,21 +768,18 @@
|
|
|
| void Assembler::cmp(Register reg, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(7, Operand(reg), Immediate(imm32));
|
| }
|
|
|
|
|
| void Assembler::cmp(Register reg, Handle<Object> handle) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(7, Operand(reg), Immediate(handle));
|
| }
|
|
|
|
|
| void Assembler::cmp(Register reg, const Operand& op) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x3B);
|
| emit_operand(reg, op);
|
| }
|
| @@ -966,21 +787,18 @@
|
|
|
| void Assembler::cmp(const Operand& op, const Immediate& imm) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(7, op, imm);
|
| }
|
|
|
|
|
| void Assembler::cmp(const Operand& op, Handle<Object> handle) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(7, op, Immediate(handle));
|
| }
|
|
|
|
|
| void Assembler::cmpb_al(const Operand& op) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x38); // CMP r/m8, r8
|
| emit_operand(eax, op); // eax has same code as register al.
|
| }
|
| @@ -988,7 +806,6 @@
|
|
|
| void Assembler::cmpw_ax(const Operand& op) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x39); // CMP r/m16, r16
|
| emit_operand(eax, op); // eax has same code as register ax.
|
| @@ -997,7 +814,6 @@
|
|
|
| void Assembler::dec_b(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFE);
|
| EMIT(0xC8 | dst.code());
|
| }
|
| @@ -1005,7 +821,6 @@
|
|
|
| void Assembler::dec_b(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFE);
|
| emit_operand(ecx, dst);
|
| }
|
| @@ -1013,14 +828,12 @@
|
|
|
| void Assembler::dec(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x48 | dst.code());
|
| }
|
|
|
|
|
| void Assembler::dec(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFF);
|
| emit_operand(ecx, dst);
|
| }
|
| @@ -1028,14 +841,12 @@
|
|
|
| void Assembler::cdq() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x99);
|
| }
|
|
|
|
|
| void Assembler::idiv(Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF7);
|
| EMIT(0xF8 | src.code());
|
| }
|
| @@ -1043,7 +854,6 @@
|
|
|
| void Assembler::imul(Register reg) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF7);
|
| EMIT(0xE8 | reg.code());
|
| }
|
| @@ -1051,7 +861,6 @@
|
|
|
| void Assembler::imul(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xAF);
|
| emit_operand(dst, src);
|
| @@ -1060,7 +869,6 @@
|
|
|
| void Assembler::imul(Register dst, Register src, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (is_int8(imm32)) {
|
| EMIT(0x6B);
|
| EMIT(0xC0 | dst.code() << 3 | src.code());
|
| @@ -1075,14 +883,12 @@
|
|
|
| void Assembler::inc(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x40 | dst.code());
|
| }
|
|
|
|
|
| void Assembler::inc(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFF);
|
| emit_operand(eax, dst);
|
| }
|
| @@ -1090,7 +896,6 @@
|
|
|
| void Assembler::lea(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x8D);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1098,7 +903,6 @@
|
|
|
| void Assembler::mul(Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF7);
|
| EMIT(0xE0 | src.code());
|
| }
|
| @@ -1106,7 +910,6 @@
|
|
|
| void Assembler::neg(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF7);
|
| EMIT(0xD8 | dst.code());
|
| }
|
| @@ -1114,7 +917,6 @@
|
|
|
| void Assembler::not_(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF7);
|
| EMIT(0xD0 | dst.code());
|
| }
|
| @@ -1122,14 +924,12 @@
|
|
|
| void Assembler::or_(Register dst, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(1, Operand(dst), Immediate(imm32));
|
| }
|
|
|
|
|
| void Assembler::or_(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0B);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1137,14 +937,12 @@
|
|
|
| void Assembler::or_(const Operand& dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(1, dst, x);
|
| }
|
|
|
|
|
| void Assembler::or_(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x09);
|
| emit_operand(src, dst);
|
| }
|
| @@ -1152,7 +950,6 @@
|
|
|
| void Assembler::rcl(Register dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
|
| EMIT(0xD1);
|
| @@ -1167,7 +964,6 @@
|
|
|
| void Assembler::rcr(Register dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
|
| EMIT(0xD1);
|
| @@ -1182,7 +978,6 @@
|
|
|
| void Assembler::sar(Register dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
|
| EMIT(0xD1);
|
| @@ -1197,7 +992,6 @@
|
|
|
| void Assembler::sar_cl(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD3);
|
| EMIT(0xF8 | dst.code());
|
| }
|
| @@ -1205,7 +999,6 @@
|
|
|
| void Assembler::sbb(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x1B);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1213,7 +1006,6 @@
|
|
|
| void Assembler::shld(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xA5);
|
| emit_operand(dst, src);
|
| @@ -1222,7 +1014,6 @@
|
|
|
| void Assembler::shl(Register dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
|
| EMIT(0xD1);
|
| @@ -1237,7 +1028,6 @@
|
|
|
| void Assembler::shl_cl(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD3);
|
| EMIT(0xE0 | dst.code());
|
| }
|
| @@ -1245,7 +1035,6 @@
|
|
|
| void Assembler::shrd(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xAD);
|
| emit_operand(dst, src);
|
| @@ -1254,7 +1043,6 @@
|
|
|
| void Assembler::shr(Register dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
|
| EMIT(0xD1);
|
| @@ -1269,7 +1057,6 @@
|
|
|
| void Assembler::shr_cl(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD3);
|
| EMIT(0xE8 | dst.code());
|
| }
|
| @@ -1277,7 +1064,6 @@
|
|
|
| void Assembler::subb(const Operand& op, int8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (op.is_reg(eax)) {
|
| EMIT(0x2c);
|
| } else {
|
| @@ -1290,14 +1076,12 @@
|
|
|
| void Assembler::sub(const Operand& dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(5, dst, x);
|
| }
|
|
|
|
|
| void Assembler::sub(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x2B);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1306,7 +1090,6 @@
|
| void Assembler::subb(Register dst, const Operand& src) {
|
| ASSERT(dst.code() < 4);
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x2A);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1314,7 +1097,6 @@
|
|
|
| void Assembler::sub(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x29);
|
| emit_operand(src, dst);
|
| }
|
| @@ -1322,7 +1104,6 @@
|
|
|
| void Assembler::test(Register reg, const Immediate& imm) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| // Only use test against byte for registers that have a byte
|
| // variant: eax, ebx, ecx, and edx.
|
| if (imm.rmode_ == RelocInfo::NONE && is_uint8(imm.x_) && reg.code() < 4) {
|
| @@ -1349,7 +1130,6 @@
|
|
|
| void Assembler::test(Register reg, const Operand& op) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x85);
|
| emit_operand(reg, op);
|
| }
|
| @@ -1357,7 +1137,6 @@
|
|
|
| void Assembler::test_b(Register reg, const Operand& op) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x84);
|
| emit_operand(reg, op);
|
| }
|
| @@ -1365,7 +1144,6 @@
|
|
|
| void Assembler::test(const Operand& op, const Immediate& imm) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF7);
|
| emit_operand(eax, op);
|
| emit(imm);
|
| @@ -1374,7 +1152,6 @@
|
|
|
| void Assembler::test_b(const Operand& op, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF6);
|
| emit_operand(eax, op);
|
| EMIT(imm8);
|
| @@ -1383,14 +1160,12 @@
|
|
|
| void Assembler::xor_(Register dst, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(6, Operand(dst), Immediate(imm32));
|
| }
|
|
|
|
|
| void Assembler::xor_(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x33);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1398,7 +1173,6 @@
|
|
|
| void Assembler::xor_(const Operand& src, Register dst) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x31);
|
| emit_operand(dst, src);
|
| }
|
| @@ -1406,14 +1180,12 @@
|
|
|
| void Assembler::xor_(const Operand& dst, const Immediate& x) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_arith(6, dst, x);
|
| }
|
|
|
|
|
| void Assembler::bt(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xA3);
|
| emit_operand(src, dst);
|
| @@ -1422,7 +1194,6 @@
|
|
|
| void Assembler::bts(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0xAB);
|
| emit_operand(src, dst);
|
| @@ -1431,21 +1202,18 @@
|
|
|
| void Assembler::hlt() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF4);
|
| }
|
|
|
|
|
| void Assembler::int3() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xCC);
|
| }
|
|
|
|
|
| void Assembler::nop() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x90);
|
| }
|
|
|
| @@ -1453,7 +1221,6 @@
|
| void Assembler::rdtsc() {
|
| ASSERT(CpuFeatures::IsEnabled(RDTSC));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0x31);
|
| }
|
| @@ -1461,7 +1228,6 @@
|
|
|
| void Assembler::ret(int imm16) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(is_uint16(imm16));
|
| if (imm16 == 0) {
|
| EMIT(0xC3);
|
| @@ -1507,7 +1273,6 @@
|
|
|
| void Assembler::bind_to(Label* L, int pos) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = NULL;
|
| ASSERT(0 <= pos && pos <= pc_offset()); // must have a valid binding position
|
| while (L->is_linked()) {
|
| Displacement disp = disp_at(L);
|
| @@ -1546,7 +1311,6 @@
|
|
|
| void Assembler::bind(Label* L) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = NULL;
|
| ASSERT(!L->is_bound()); // label can only be bound once
|
| bind_to(L, pc_offset());
|
| }
|
| @@ -1555,7 +1319,6 @@
|
| void Assembler::call(Label* L) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (L->is_bound()) {
|
| const int long_size = 5;
|
| int offs = L->pos() - pc_offset();
|
| @@ -1574,7 +1337,6 @@
|
| void Assembler::call(byte* entry, RelocInfo::Mode rmode) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(!RelocInfo::IsCodeTarget(rmode));
|
| EMIT(0xE8);
|
| emit(entry - (pc_ + sizeof(int32_t)), rmode);
|
| @@ -1590,10 +1352,8 @@
|
| void Assembler::call(const Operand& adr) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFF);
|
| emit_operand(edx, adr);
|
| - ASSERT(pc_ - last_pc_ == CallSize(adr));
|
| }
|
|
|
|
|
| @@ -1607,7 +1367,6 @@
|
| unsigned ast_id) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(RelocInfo::IsCodeTarget(rmode));
|
| EMIT(0xE8);
|
| emit(reinterpret_cast<intptr_t>(code.location()), rmode, ast_id);
|
| @@ -1616,7 +1375,6 @@
|
|
|
| void Assembler::jmp(Label* L, Label::Distance distance) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (L->is_bound()) {
|
| const int short_size = 2;
|
| const int long_size = 5;
|
| @@ -1644,7 +1402,6 @@
|
|
|
| void Assembler::jmp(byte* entry, RelocInfo::Mode rmode) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(!RelocInfo::IsCodeTarget(rmode));
|
| EMIT(0xE9);
|
| emit(entry - (pc_ + sizeof(int32_t)), rmode);
|
| @@ -1653,7 +1410,6 @@
|
|
|
| void Assembler::jmp(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xFF);
|
| emit_operand(esp, adr);
|
| }
|
| @@ -1661,7 +1417,6 @@
|
|
|
| void Assembler::jmp(Handle<Code> code, RelocInfo::Mode rmode) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(RelocInfo::IsCodeTarget(rmode));
|
| EMIT(0xE9);
|
| emit(reinterpret_cast<intptr_t>(code.location()), rmode);
|
| @@ -1670,7 +1425,6 @@
|
|
|
| void Assembler::j(Condition cc, Label* L, Hint hint, Label::Distance distance) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT(0 <= cc && cc < 16);
|
| if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
|
| if (L->is_bound()) {
|
| @@ -1704,7 +1458,6 @@
|
|
|
| void Assembler::j(Condition cc, byte* entry, RelocInfo::Mode rmode, Hint hint) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| ASSERT((0 <= cc) && (cc < 16));
|
| if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
|
| // 0000 1111 1000 tttn #32-bit disp.
|
| @@ -1716,7 +1469,6 @@
|
|
|
| void Assembler::j(Condition cc, Handle<Code> code, Hint hint) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
|
| // 0000 1111 1000 tttn #32-bit disp
|
| EMIT(0x0F);
|
| @@ -1729,21 +1481,18 @@
|
|
|
| void Assembler::fld(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xD9, 0xC0, i);
|
| }
|
|
|
|
|
| void Assembler::fstp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDD, 0xD8, i);
|
| }
|
|
|
|
|
| void Assembler::fld1() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xE8);
|
| }
|
| @@ -1751,7 +1500,6 @@
|
|
|
| void Assembler::fldpi() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xEB);
|
| }
|
| @@ -1759,7 +1507,6 @@
|
|
|
| void Assembler::fldz() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xEE);
|
| }
|
| @@ -1767,7 +1514,6 @@
|
|
|
| void Assembler::fldln2() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xED);
|
| }
|
| @@ -1775,7 +1521,6 @@
|
|
|
| void Assembler::fld_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| emit_operand(eax, adr);
|
| }
|
| @@ -1783,7 +1528,6 @@
|
|
|
| void Assembler::fld_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDD);
|
| emit_operand(eax, adr);
|
| }
|
| @@ -1791,7 +1535,6 @@
|
|
|
| void Assembler::fstp_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| emit_operand(ebx, adr);
|
| }
|
| @@ -1799,7 +1542,6 @@
|
|
|
| void Assembler::fstp_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDD);
|
| emit_operand(ebx, adr);
|
| }
|
| @@ -1807,7 +1549,6 @@
|
|
|
| void Assembler::fst_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDD);
|
| emit_operand(edx, adr);
|
| }
|
| @@ -1815,7 +1556,6 @@
|
|
|
| void Assembler::fild_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDB);
|
| emit_operand(eax, adr);
|
| }
|
| @@ -1823,7 +1563,6 @@
|
|
|
| void Assembler::fild_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDF);
|
| emit_operand(ebp, adr);
|
| }
|
| @@ -1831,7 +1570,6 @@
|
|
|
| void Assembler::fistp_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDB);
|
| emit_operand(ebx, adr);
|
| }
|
| @@ -1840,7 +1578,6 @@
|
| void Assembler::fisttp_s(const Operand& adr) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE3));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDB);
|
| emit_operand(ecx, adr);
|
| }
|
| @@ -1849,7 +1586,6 @@
|
| void Assembler::fisttp_d(const Operand& adr) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE3));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDD);
|
| emit_operand(ecx, adr);
|
| }
|
| @@ -1857,7 +1593,6 @@
|
|
|
| void Assembler::fist_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDB);
|
| emit_operand(edx, adr);
|
| }
|
| @@ -1865,7 +1600,6 @@
|
|
|
| void Assembler::fistp_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDF);
|
| emit_operand(edi, adr);
|
| }
|
| @@ -1873,7 +1607,6 @@
|
|
|
| void Assembler::fabs() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xE1);
|
| }
|
| @@ -1881,7 +1614,6 @@
|
|
|
| void Assembler::fchs() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xE0);
|
| }
|
| @@ -1889,7 +1621,6 @@
|
|
|
| void Assembler::fcos() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xFF);
|
| }
|
| @@ -1897,7 +1628,6 @@
|
|
|
| void Assembler::fsin() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xFE);
|
| }
|
| @@ -1905,7 +1635,6 @@
|
|
|
| void Assembler::fyl2x() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xF1);
|
| }
|
| @@ -1913,21 +1642,18 @@
|
|
|
| void Assembler::fadd(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDC, 0xC0, i);
|
| }
|
|
|
|
|
| void Assembler::fsub(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDC, 0xE8, i);
|
| }
|
|
|
|
|
| void Assembler::fisub_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDA);
|
| emit_operand(esp, adr);
|
| }
|
| @@ -1935,56 +1661,48 @@
|
|
|
| void Assembler::fmul(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDC, 0xC8, i);
|
| }
|
|
|
|
|
| void Assembler::fdiv(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDC, 0xF8, i);
|
| }
|
|
|
|
|
| void Assembler::faddp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDE, 0xC0, i);
|
| }
|
|
|
|
|
| void Assembler::fsubp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDE, 0xE8, i);
|
| }
|
|
|
|
|
| void Assembler::fsubrp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDE, 0xE0, i);
|
| }
|
|
|
|
|
| void Assembler::fmulp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDE, 0xC8, i);
|
| }
|
|
|
|
|
| void Assembler::fdivp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDE, 0xF8, i);
|
| }
|
|
|
|
|
| void Assembler::fprem() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xF8);
|
| }
|
| @@ -1992,7 +1710,6 @@
|
|
|
| void Assembler::fprem1() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xF5);
|
| }
|
| @@ -2000,14 +1717,12 @@
|
|
|
| void Assembler::fxch(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xD9, 0xC8, i);
|
| }
|
|
|
|
|
| void Assembler::fincstp() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xF7);
|
| }
|
| @@ -2015,14 +1730,12 @@
|
|
|
| void Assembler::ffree(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDD, 0xC0, i);
|
| }
|
|
|
|
|
| void Assembler::ftst() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xE4);
|
| }
|
| @@ -2030,14 +1743,12 @@
|
|
|
| void Assembler::fucomp(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| emit_farith(0xDD, 0xE8, i);
|
| }
|
|
|
|
|
| void Assembler::fucompp() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDA);
|
| EMIT(0xE9);
|
| }
|
| @@ -2045,7 +1756,6 @@
|
|
|
| void Assembler::fucomi(int i) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDB);
|
| EMIT(0xE8 + i);
|
| }
|
| @@ -2053,7 +1763,6 @@
|
|
|
| void Assembler::fucomip() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDF);
|
| EMIT(0xE9);
|
| }
|
| @@ -2061,7 +1770,6 @@
|
|
|
| void Assembler::fcompp() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDE);
|
| EMIT(0xD9);
|
| }
|
| @@ -2069,7 +1777,6 @@
|
|
|
| void Assembler::fnstsw_ax() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDF);
|
| EMIT(0xE0);
|
| }
|
| @@ -2077,14 +1784,12 @@
|
|
|
| void Assembler::fwait() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x9B);
|
| }
|
|
|
|
|
| void Assembler::frndint() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xD9);
|
| EMIT(0xFC);
|
| }
|
| @@ -2092,7 +1797,6 @@
|
|
|
| void Assembler::fnclex() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xDB);
|
| EMIT(0xE2);
|
| }
|
| @@ -2100,7 +1804,6 @@
|
|
|
| void Assembler::sahf() {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x9E);
|
| }
|
|
|
| @@ -2108,7 +1811,6 @@
|
| void Assembler::setcc(Condition cc, Register reg) {
|
| ASSERT(reg.is_byte_register());
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0x90 | cc);
|
| EMIT(0xC0 | reg.code());
|
| @@ -2118,7 +1820,6 @@
|
| void Assembler::cvttss2si(Register dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0x0F);
|
| EMIT(0x2C);
|
| @@ -2129,7 +1830,6 @@
|
| void Assembler::cvttsd2si(Register dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x2C);
|
| @@ -2140,7 +1840,6 @@
|
| void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x2A);
|
| @@ -2151,7 +1850,6 @@
|
| void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0x0F);
|
| EMIT(0x5A);
|
| @@ -2162,7 +1860,6 @@
|
| void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x5A);
|
| @@ -2173,7 +1870,6 @@
|
| void Assembler::addsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x58);
|
| @@ -2184,7 +1880,6 @@
|
| void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x59);
|
| @@ -2195,7 +1890,6 @@
|
| void Assembler::subsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x5C);
|
| @@ -2206,7 +1900,6 @@
|
| void Assembler::divsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x5E);
|
| @@ -2217,7 +1910,6 @@
|
| void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x57);
|
| @@ -2227,7 +1919,6 @@
|
|
|
| void Assembler::xorps(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0x57);
|
| emit_sse_operand(dst, src);
|
| @@ -2236,7 +1927,6 @@
|
|
|
| void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x51);
|
| @@ -2246,7 +1936,6 @@
|
|
|
| void Assembler::andpd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x54);
|
| @@ -2257,7 +1946,6 @@
|
| void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x2E);
|
| @@ -2268,7 +1956,6 @@
|
| void Assembler::movmskpd(Register dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x50);
|
| @@ -2279,7 +1966,6 @@
|
| void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0xC2);
|
| @@ -2291,7 +1977,6 @@
|
| void Assembler::movaps(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0x28);
|
| emit_sse_operand(dst, src);
|
| @@ -2301,7 +1986,6 @@
|
| void Assembler::movdqa(const Operand& dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x7F);
|
| @@ -2312,7 +1996,6 @@
|
| void Assembler::movdqa(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x6F);
|
| @@ -2323,7 +2006,6 @@
|
| void Assembler::movdqu(const Operand& dst, XMMRegister src ) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0x0F);
|
| EMIT(0x7F);
|
| @@ -2334,7 +2016,6 @@
|
| void Assembler::movdqu(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0x0F);
|
| EMIT(0x6F);
|
| @@ -2345,7 +2026,6 @@
|
| void Assembler::movntdqa(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x38);
|
| @@ -2357,7 +2037,6 @@
|
| void Assembler::movntdq(const Operand& dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0xE7);
|
| @@ -2368,7 +2047,6 @@
|
| void Assembler::prefetch(const Operand& src, int level) {
|
| ASSERT(is_uint2(level));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x0F);
|
| EMIT(0x18);
|
| XMMRegister code = { level }; // Emit hint number in Reg position of RegR/M.
|
| @@ -2378,14 +2056,12 @@
|
|
|
| void Assembler::movdbl(XMMRegister dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| movsd(dst, src);
|
| }
|
|
|
|
|
| void Assembler::movdbl(const Operand& dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| movsd(dst, src);
|
| }
|
|
|
| @@ -2393,7 +2069,6 @@
|
| void Assembler::movsd(const Operand& dst, XMMRegister src ) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2); // double
|
| EMIT(0x0F);
|
| EMIT(0x11); // store
|
| @@ -2404,7 +2079,6 @@
|
| void Assembler::movsd(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2); // double
|
| EMIT(0x0F);
|
| EMIT(0x10); // load
|
| @@ -2415,7 +2089,6 @@
|
| void Assembler::movsd(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF2);
|
| EMIT(0x0F);
|
| EMIT(0x10);
|
| @@ -2426,7 +2099,6 @@
|
| void Assembler::movss(const Operand& dst, XMMRegister src ) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3); // float
|
| EMIT(0x0F);
|
| EMIT(0x11); // store
|
| @@ -2437,7 +2109,6 @@
|
| void Assembler::movss(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3); // float
|
| EMIT(0x0F);
|
| EMIT(0x10); // load
|
| @@ -2448,7 +2119,6 @@
|
| void Assembler::movss(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0xF3);
|
| EMIT(0x0F);
|
| EMIT(0x10);
|
| @@ -2459,7 +2129,6 @@
|
| void Assembler::movd(XMMRegister dst, const Operand& src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x6E);
|
| @@ -2470,7 +2139,6 @@
|
| void Assembler::movd(const Operand& dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x7E);
|
| @@ -2481,7 +2149,6 @@
|
| void Assembler::pand(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0xDB);
|
| @@ -2492,7 +2159,6 @@
|
| void Assembler::pxor(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0xEF);
|
| @@ -2503,7 +2169,6 @@
|
| void Assembler::por(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0xEB);
|
| @@ -2514,7 +2179,6 @@
|
| void Assembler::ptest(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x38);
|
| @@ -2526,7 +2190,6 @@
|
| void Assembler::psllq(XMMRegister reg, int8_t shift) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x73);
|
| @@ -2538,7 +2201,6 @@
|
| void Assembler::psllq(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0xF3);
|
| @@ -2549,7 +2211,6 @@
|
| void Assembler::psrlq(XMMRegister reg, int8_t shift) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x73);
|
| @@ -2561,7 +2222,6 @@
|
| void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0xD3);
|
| @@ -2572,7 +2232,6 @@
|
| void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x70);
|
| @@ -2584,7 +2243,6 @@
|
| void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x3A);
|
| @@ -2597,7 +2255,6 @@
|
| void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| - last_pc_ = pc_;
|
| EMIT(0x66);
|
| EMIT(0x0F);
|
| EMIT(0x3A);
|
| @@ -2696,9 +2353,6 @@
|
| buffer_ = desc.buffer;
|
| buffer_size_ = desc.buffer_size;
|
| pc_ += pc_delta;
|
| - if (last_pc_ != NULL) {
|
| - last_pc_ += pc_delta;
|
| - }
|
| reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta,
|
| reloc_info_writer.last_pc() + pc_delta);
|
|
|
|
|