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1 // Copyright 2010 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
11 // with the distribution. | 11 // with the distribution. |
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86 // Number coprocessor registers. | 86 // Number coprocessor registers. |
87 static const int kNumFPURegisters = 32; | 87 static const int kNumFPURegisters = 32; |
88 static const int kInvalidFPURegister = -1; | 88 static const int kInvalidFPURegister = -1; |
89 | 89 |
90 // FPU (coprocessor 1) control registers. Currently only FCSR is implemented. | 90 // FPU (coprocessor 1) control registers. Currently only FCSR is implemented. |
91 static const int kFCSRRegister = 31; | 91 static const int kFCSRRegister = 31; |
92 static const int kInvalidFPUControlRegister = -1; | 92 static const int kInvalidFPUControlRegister = -1; |
93 static const uint32_t kFPUInvalidResult = (uint32_t) (1 << 31) - 1; | 93 static const uint32_t kFPUInvalidResult = (uint32_t) (1 << 31) - 1; |
94 | 94 |
95 // FCSR constants. | 95 // FCSR constants. |
96 static const uint32_t kFCSRFlagMask = (1 << 6) - 1; | 96 static const uint32_t kFCSRInexactFlagBit = 2; |
97 static const uint32_t kFCSRFlagShift = 2; | 97 static const uint32_t kFCSRUnderflowFlagBit = 3; |
98 static const uint32_t kFCSRInexactFlagBit = 1 << 0; | 98 static const uint32_t kFCSROverflowFlagBit = 4; |
99 static const uint32_t kFCSRUnderflowFlagBit = 1 << 1; | 99 static const uint32_t kFCSRDivideByZeroFlagBit = 5; |
100 static const uint32_t kFCSROverflowFlagBit = 1 << 2; | 100 static const uint32_t kFCSRInvalidOpFlagBit = 6; |
101 static const uint32_t kFCSRDivideByZeroFlagBit = 1 << 3; | 101 |
102 static const uint32_t kFCSRInvalidOpFlagBit = 1 << 4; | 102 static const uint32_t kFCSRInexactFlagMask = 1 << kFCSRInexactFlagBit; |
| 103 static const uint32_t kFCSRUnderflowFlagMask = 1 << kFCSRUnderflowFlagBit; |
| 104 static const uint32_t kFCSROverflowFlagMask = 1 << kFCSROverflowFlagBit; |
| 105 static const uint32_t kFCSRDivideByZeroFlagMask = 1 << kFCSRDivideByZeroFlagBit; |
| 106 static const uint32_t kFCSRInvalidOpFlagMask = 1 << kFCSRInvalidOpFlagBit; |
| 107 |
| 108 static const uint32_t kFCSRFlagMask = |
| 109 kFCSRInexactFlagMask | |
| 110 kFCSRUnderflowFlagMask | |
| 111 kFCSROverflowFlagMask | |
| 112 kFCSRDivideByZeroFlagMask | |
| 113 kFCSRInvalidOpFlagMask; |
| 114 |
| 115 static const uint32_t kFCSRExceptionFlagMask = |
| 116 kFCSRFlagMask ^ kFCSRInexactFlagMask; |
103 | 117 |
104 // Helper functions for converting between register numbers and names. | 118 // Helper functions for converting between register numbers and names. |
105 class Registers { | 119 class Registers { |
106 public: | 120 public: |
107 // Return the name of the register. | 121 // Return the name of the register. |
108 static const char* Name(int reg); | 122 static const char* Name(int reg); |
109 | 123 |
110 // Lookup the register number for the name provided. | 124 // Lookup the register number for the name provided. |
111 static int Number(const char* name); | 125 static int Number(const char* name); |
112 | 126 |
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741 static const int kBranchReturnOffset = 2 * Instruction::kInstrSize; | 755 static const int kBranchReturnOffset = 2 * Instruction::kInstrSize; |
742 | 756 |
743 static const int kDoubleAlignmentBits = 3; | 757 static const int kDoubleAlignmentBits = 3; |
744 static const int kDoubleAlignment = (1 << kDoubleAlignmentBits); | 758 static const int kDoubleAlignment = (1 << kDoubleAlignmentBits); |
745 static const int kDoubleAlignmentMask = kDoubleAlignment - 1; | 759 static const int kDoubleAlignmentMask = kDoubleAlignment - 1; |
746 | 760 |
747 | 761 |
748 } } // namespace v8::internal | 762 } } // namespace v8::internal |
749 | 763 |
750 #endif // #ifndef V8_MIPS_CONSTANTS_H_ | 764 #endif // #ifndef V8_MIPS_CONSTANTS_H_ |
751 | |
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