Index: src/mips/constants-mips.h |
diff --git a/src/mips/constants-mips.h b/src/mips/constants-mips.h |
index cb9d429f32389b57ee0ede045554680c4e13b8a6..57311eecabeb01d03e2108d58ddd2b03d46f1de2 100644 |
--- a/src/mips/constants-mips.h |
+++ b/src/mips/constants-mips.h |
@@ -93,13 +93,26 @@ static const int kInvalidFPUControlRegister = -1; |
static const uint32_t kFPUInvalidResult = (uint32_t) (1 << 31) - 1; |
// FCSR constants. |
-static const uint32_t kFCSRFlagMask = (1 << 6) - 1; |
-static const uint32_t kFCSRFlagShift = 2; |
-static const uint32_t kFCSRInexactFlagBit = 1 << 0; |
-static const uint32_t kFCSRUnderflowFlagBit = 1 << 1; |
-static const uint32_t kFCSROverflowFlagBit = 1 << 2; |
-static const uint32_t kFCSRDivideByZeroFlagBit = 1 << 3; |
-static const uint32_t kFCSRInvalidOpFlagBit = 1 << 4; |
+static const uint32_t kFCSRInexactFlagBit = 2; |
+static const uint32_t kFCSRUnderflowFlagBit = 3; |
+static const uint32_t kFCSROverflowFlagBit = 4; |
+static const uint32_t kFCSRDivideByZeroFlagBit = 5; |
+static const uint32_t kFCSRInvalidOpFlagBit = 6; |
+ |
+static const uint32_t kFCSRInexactFlagMask = 1 << kFCSRInexactFlagBit; |
+static const uint32_t kFCSRUnderflowFlagMask = 1 << kFCSRUnderflowFlagBit; |
+static const uint32_t kFCSROverflowFlagMask = 1 << kFCSROverflowFlagBit; |
+static const uint32_t kFCSRDivideByZeroFlagMask = 1 << kFCSRDivideByZeroFlagBit; |
+static const uint32_t kFCSRInvalidOpFlagMask = 1 << kFCSRInvalidOpFlagBit; |
+ |
+static const uint32_t kFCSRFlagMask = kFCSRInexactFlagMask | |
+ kFCSRUnderflowFlagMask | |
Mads Ager (chromium)
2011/06/06 08:39:02
Four-space indent for these.
|
+ kFCSROverflowFlagMask | |
+ kFCSRDivideByZeroFlagMask | |
+ kFCSRInvalidOpFlagMask; |
+ |
+static const uint32_t kFCSRExceptionFlagMask = kFCSRFlagMask ^ |
+ kFCSRInexactFlagMask; |
Mads Ager (chromium)
2011/06/06 08:39:02
Four-space indent.
|
// Helper functions for converting between register numbers and names. |
class Registers { |