MIPS: Fixed FPU rounding checks and related errors in the Simulator.

src/mips/stub-cache-mips.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 2078 matching lines @@
   __ floor_w_d(f0, f0);
 
   // Start checking for special cases.
   // Get the argument exponent and clear the sign bit.
   __ lw(t1, FieldMemOperand(v0, HeapNumber::kValueOffset + kPointerSize));
   __ And(t2, t1, Operand(~HeapNumber::kSignMask));
   __ srl(t2, t2, HeapNumber::kMantissaBitsInTopWord);
 
   // Retrieve FCSR and check for fpu errors.
   __ cfc1(t5, FCSR);
-  __ srl(t5, t5, kFCSRFlagShift);
-  // Flag 1 marks an inaccurate but still good result so we ignore it.
-  __ And(t5, t5, Operand(kFCSRFlagMask ^ 1));
+  __ And(t5, t5, Operand(kFCSRExceptionFlagMask));
   __ Branch(&no_fpu_error, eq, t5, Operand(zero_reg));
 
   // Check for NaN, Infinity, and -Infinity.
   // They are invariant through a Math.Floor call, so just
   // return the original argument.
   __ Subu(t3, t2, Operand(HeapNumber::kExponentMask
         >> HeapNumber::kMantissaBitsInTopWord));
   __ Branch(&restore_fcsr_and_return, eq, t3, Operand(zero_reg));
   // We had an overflow or underflow in the conversion. Check if we
   // have a big exponent.
@@ skipping 2156 matching lines @@
       masm->isolate()->builtins()->KeyedStoreIC_MissForceGeneric();
   __ Jump(ic, RelocInfo::CODE_TARGET);
 }
 
 
 #undef __
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_MIPS