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Issue 6965006: Update mips infrastructure files. (Closed) Base URL: http://github.com/v8/v8.git@bleeding_edge
Patch Set: Fix additional style issues. Created 9 years, 7 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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31 31
32 // Note on Mips implementation: 32 // Note on Mips implementation:
33 // 33 //
34 // The result_register() for mips is the 'v0' register, which is defined 34 // The result_register() for mips is the 'v0' register, which is defined
35 // by the ABI to contain function return values. However, the first 35 // by the ABI to contain function return values. However, the first
36 // parameter to a function is defined to be 'a0'. So there are many 36 // parameter to a function is defined to be 'a0'. So there are many
37 // places where we have to move a previous result in v0 to a0 for the 37 // places where we have to move a previous result in v0 to a0 for the
38 // next call: mov(a0, v0). This is not needed on the other architectures. 38 // next call: mov(a0, v0). This is not needed on the other architectures.
39 39
40 #include "code-stubs.h" 40 #include "code-stubs.h"
41 #include "codegen-inl.h" 41 #include "codegen.h"
42 #include "compiler.h" 42 #include "compiler.h"
43 #include "debug.h" 43 #include "debug.h"
44 #include "full-codegen.h" 44 #include "full-codegen.h"
45 #include "parser.h" 45 #include "parser.h"
46 #include "scopes.h" 46 #include "scopes.h"
47 #include "stub-cache.h" 47 #include "stub-cache.h"
48 48
49 #include "mips/code-stubs-mips.h" 49 #include "mips/code-stubs-mips.h"
50 50
51 namespace v8 { 51 namespace v8 {
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361 void FullCodeGenerator::EmitNamedPropertyLoad(Property* prop) { 361 void FullCodeGenerator::EmitNamedPropertyLoad(Property* prop) {
362 UNIMPLEMENTED_MIPS(); 362 UNIMPLEMENTED_MIPS();
363 } 363 }
364 364
365 365
366 void FullCodeGenerator::EmitKeyedPropertyLoad(Property* prop) { 366 void FullCodeGenerator::EmitKeyedPropertyLoad(Property* prop) {
367 UNIMPLEMENTED_MIPS(); 367 UNIMPLEMENTED_MIPS();
368 } 368 }
369 369
370 370
371 void FullCodeGenerator::EmitInlineSmiBinaryOp(Expression* expr, 371 void FullCodeGenerator::EmitInlineSmiBinaryOp(BinaryOperation* expr,
372 Token::Value op, 372 Token::Value op,
373 OverwriteMode mode, 373 OverwriteMode mode,
374 Expression* left, 374 Expression* left,
375 Expression* right) { 375 Expression* right) {
376 UNIMPLEMENTED_MIPS(); 376 UNIMPLEMENTED_MIPS();
377 } 377 }
378 378
379 379
380 void FullCodeGenerator::EmitBinaryOp(Token::Value op, 380 void FullCodeGenerator::EmitBinaryOp(BinaryOperation* expr,
381 Token::Value op,
381 OverwriteMode mode) { 382 OverwriteMode mode) {
382 UNIMPLEMENTED_MIPS(); 383 UNIMPLEMENTED_MIPS();
383 } 384 }
384 385
385 386
386 void FullCodeGenerator::EmitAssignment(Expression* expr, int bailout_ast_id) { 387 void FullCodeGenerator::EmitAssignment(Expression* expr, int bailout_ast_id) {
387 UNIMPLEMENTED_MIPS(); 388 UNIMPLEMENTED_MIPS();
388 } 389 }
389 390
390 391
(...skipping 25 matching lines...) Expand all
416 } 417 }
417 418
418 419
419 void FullCodeGenerator::EmitKeyedCallWithIC(Call* expr, 420 void FullCodeGenerator::EmitKeyedCallWithIC(Call* expr,
420 Expression* key, 421 Expression* key,
421 RelocInfo::Mode mode) { 422 RelocInfo::Mode mode) {
422 UNIMPLEMENTED_MIPS(); 423 UNIMPLEMENTED_MIPS();
423 } 424 }
424 425
425 426
426 void FullCodeGenerator::EmitCallWithStub(Call* expr) { 427 void FullCodeGenerator::EmitCallWithStub(Call* expr, CallFunctionFlags flags) {
427 UNIMPLEMENTED_MIPS(); 428 UNIMPLEMENTED_MIPS();
428 } 429 }
429 430
430 431
431 void FullCodeGenerator::VisitCall(Call* expr) { 432 void FullCodeGenerator::VisitCall(Call* expr) {
432 UNIMPLEMENTED_MIPS(); 433 UNIMPLEMENTED_MIPS();
433 } 434 }
434 435
435 436
436 void FullCodeGenerator::VisitCallNew(CallNew* expr) { 437 void FullCodeGenerator::VisitCallNew(CallNew* expr) {
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685 return v0; 686 return v0;
686 } 687 }
687 688
688 689
689 Register FullCodeGenerator::context_register() { 690 Register FullCodeGenerator::context_register() {
690 UNIMPLEMENTED_MIPS(); 691 UNIMPLEMENTED_MIPS();
691 return cp; 692 return cp;
692 } 693 }
693 694
694 695
695 void FullCodeGenerator::EmitCallIC(Handle<Code> ic, RelocInfo::Mode mode) { 696 void FullCodeGenerator::EmitCallIC(Handle<Code> ic,
697 RelocInfo::Mode mode,
698 unsigned ast_id) {
696 UNIMPLEMENTED_MIPS(); 699 UNIMPLEMENTED_MIPS();
697 } 700 }
698 701
699 702
700 void FullCodeGenerator::StoreToFrameField(int frame_offset, Register value) { 703 void FullCodeGenerator::StoreToFrameField(int frame_offset, Register value) {
701 UNIMPLEMENTED_MIPS(); 704 UNIMPLEMENTED_MIPS();
702 } 705 }
703 706
704 707
705 void FullCodeGenerator::LoadContextField(Register dst, int context_index) { 708 void FullCodeGenerator::LoadContextField(Register dst, int context_index) {
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718 void FullCodeGenerator::ExitFinallyBlock() { 721 void FullCodeGenerator::ExitFinallyBlock() {
719 UNIMPLEMENTED_MIPS(); 722 UNIMPLEMENTED_MIPS();
720 } 723 }
721 724
722 725
723 #undef __ 726 #undef __
724 727
725 } } // namespace v8::internal 728 } } // namespace v8::internal
726 729
727 #endif // V8_TARGET_ARCH_MIPS 730 #endif // V8_TARGET_ARCH_MIPS
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