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1 // Copyright 2010 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
11 // with the distribution. | 11 // with the distribution. |
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41 #include "cpu.h" | 41 #include "cpu.h" |
42 #include "macro-assembler.h" | 42 #include "macro-assembler.h" |
43 | 43 |
44 #include "simulator.h" // For cache flushing. | 44 #include "simulator.h" // For cache flushing. |
45 | 45 |
46 namespace v8 { | 46 namespace v8 { |
47 namespace internal { | 47 namespace internal { |
48 | 48 |
49 | 49 |
50 void CPU::Setup() { | 50 void CPU::Setup() { |
51 CpuFeatures* cpu_features = Isolate::Current()->cpu_features(); | 51 CpuFeatures::Probe(); |
52 cpu_features->Probe(true); | 52 } |
53 if (!cpu_features->IsSupported(FPU) || Serializer::enabled()) { | 53 |
54 V8::DisableCrankshaft(); | 54 |
55 } | 55 bool CPU::SupportsCrankshaft() { |
| 56 return CpuFeatures::IsSupported(FPU); |
56 } | 57 } |
57 | 58 |
58 | 59 |
59 void CPU::FlushICache(void* start, size_t size) { | 60 void CPU::FlushICache(void* start, size_t size) { |
| 61 // Nothing to do, flushing no instructions. |
| 62 if (size == 0) { |
| 63 return; |
| 64 } |
| 65 |
60 #if !defined (USE_SIMULATOR) | 66 #if !defined (USE_SIMULATOR) |
61 int res; | 67 int res; |
62 | 68 |
63 // See http://www.linux-mips.org/wiki/Cacheflush_Syscall | 69 // See http://www.linux-mips.org/wiki/Cacheflush_Syscall. |
64 res = syscall(__NR_cacheflush, start, size, ICACHE); | 70 res = syscall(__NR_cacheflush, start, size, ICACHE); |
65 | 71 |
66 if (res) { | 72 if (res) { |
67 V8_Fatal(__FILE__, __LINE__, "Failed to flush the instruction cache"); | 73 V8_Fatal(__FILE__, __LINE__, "Failed to flush the instruction cache"); |
68 } | 74 } |
69 | 75 |
70 #else // USE_SIMULATOR. | 76 #else // USE_SIMULATOR. |
71 // Not generating mips instructions for C-code. This means that we are | 77 // Not generating mips instructions for C-code. This means that we are |
72 // building a mips emulator based target. We should notify the simulator | 78 // building a mips emulator based target. We should notify the simulator |
73 // that the Icache was flushed. | 79 // that the Icache was flushed. |
74 // None of this code ends up in the snapshot so there are no issues | 80 // None of this code ends up in the snapshot so there are no issues |
75 // around whether or not to generate the code when building snapshots. | 81 // around whether or not to generate the code when building snapshots. |
76 Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size); | 82 Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size); |
77 #endif // USE_SIMULATOR. | 83 #endif // USE_SIMULATOR. |
78 } | 84 } |
79 | 85 |
80 | 86 |
81 void CPU::DebugBreak() { | 87 void CPU::DebugBreak() { |
82 #ifdef __mips | 88 #ifdef __mips |
83 asm volatile("break"); | 89 asm volatile("break"); |
84 #endif // #ifdef __mips | 90 #endif // #ifdef __mips |
85 } | 91 } |
86 | 92 |
87 | 93 |
88 } } // namespace v8::internal | 94 } } // namespace v8::internal |
89 | 95 |
90 #endif // V8_TARGET_ARCH_MIPS | 96 #endif // V8_TARGET_ARCH_MIPS |
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