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Unified Diff: src/platform-linux.cc

Issue 6904126: ARM: Enhance the hardfloat support (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Fix Created 9 years, 8 months ago
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Index: src/platform-linux.cc
diff --git a/src/platform-linux.cc b/src/platform-linux.cc
index d857cd90590dd74db84a6df1bebc2bffad42f930..db6c80ed5df1e22cbdbd0e9d40f7e88e3b3885fd 100644
--- a/src/platform-linux.cc
+++ b/src/platform-linux.cc
@@ -1,4 +1,4 @@
-// Copyright 2006-2008 the V8 project authors. All rights reserved.
+// Copyright 2011 the V8 project authors. All rights reserved.
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:
@@ -205,10 +205,32 @@ bool OS::ArmCpuHasFeature(CpuFeature feature) {
// calling this will return 1.0 and otherwise 0.0.
static void ArmUsingHardFloatHelper() {
asm("mov r0, #0");
- asm("mov r1, #0");
- asm("movt r1, #16368");
+#if defined(__VFP_FP__) && !defined(__SOFTFP__)
+ // Load 0x3ff00000 into r1 using instructions available in both ARM
+ // and Thumb mode.
+ asm("mov r1, #3");
+ asm("mov r2, #255");
+ asm("lsl r1, r1, #8");
+ asm("orr r1, r1, r2");
+ asm("lsl r1, r1, #16");
+ // For vmov d0, r0, r1 use ARM mode.
+#ifdef __thumb__
+ asm volatile(
+ "@ Enter ARM Mode \n\t"
+ " adr r3, 1f \n\t"
+ " bx r3 \n\t"
+ " .ALIGN 4 \n\t"
+ " .ARM \n"
+ "1: vmov d0, r0, r1 \n\t"
+ "@ Enter THUMB Mode\n\t"
+ " adr r3, 2f+1 \n\t"
+ " bx r3 \n\t"
+ " .THUMB \n"
+ "2: \n\t");
+#else
asm("vmov d0, r0, r1");
- asm("mov r0, #0");
+#endif // __thumb__
+#endif // defined(__VFP_FP__) && !defined(__SOFTFP__)
asm("mov r1, #0");
}
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