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1 // Copyright (c) 2006-2008 The Chromium Authors. All rights reserved. | 1 // Copyright (c) 2011 The Chromium Authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 // This file is an internal atomic implementation, use base/atomicops.h instead. | 5 // This file is an internal atomic implementation, use base/atomicops.h instead. |
6 | 6 |
7 #ifndef BASE_ATOMICOPS_INTERNALS_X86_GCC_H_ | 7 #ifndef BASE_ATOMICOPS_INTERNALS_X86_GCC_H_ |
8 #define BASE_ATOMICOPS_INTERNALS_X86_GCC_H_ | 8 #define BASE_ATOMICOPS_INTERNALS_X86_GCC_H_ |
9 #pragma once | 9 #pragma once |
10 | 10 |
| 11 #include "base/base_api.h" |
| 12 |
11 // This struct is not part of the public API of this module; clients may not | 13 // This struct is not part of the public API of this module; clients may not |
12 // use it. | 14 // use it. (However, it's exported via BASE_API because clients implicitly |
| 15 // do use it at link time by inlining these functions.) |
13 // Features of this x86. Values may not be correct before main() is run, | 16 // Features of this x86. Values may not be correct before main() is run, |
14 // but are set conservatively. | 17 // but are set conservatively. |
15 struct AtomicOps_x86CPUFeatureStruct { | 18 struct AtomicOps_x86CPUFeatureStruct { |
16 bool has_amd_lock_mb_bug; // Processor has AMD memory-barrier bug; do lfence | 19 bool has_amd_lock_mb_bug; // Processor has AMD memory-barrier bug; do lfence |
17 // after acquire compare-and-swap. | 20 // after acquire compare-and-swap. |
18 bool has_sse2; // Processor has SSE2. | 21 bool has_sse2; // Processor has SSE2. |
19 }; | 22 }; |
20 extern struct AtomicOps_x86CPUFeatureStruct AtomicOps_Internalx86CPUFeatures; | 23 BASE_API extern struct AtomicOps_x86CPUFeatureStruct |
| 24 AtomicOps_Internalx86CPUFeatures; |
21 | 25 |
22 #define ATOMICOPS_COMPILER_BARRIER() __asm__ __volatile__("" : : : "memory") | 26 #define ATOMICOPS_COMPILER_BARRIER() __asm__ __volatile__("" : : : "memory") |
23 | 27 |
24 namespace base { | 28 namespace base { |
25 namespace subtle { | 29 namespace subtle { |
26 | 30 |
27 // 32-bit low-level operations on any platform. | 31 // 32-bit low-level operations on any platform. |
28 | 32 |
29 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, | 33 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, |
30 Atomic32 old_value, | 34 Atomic32 old_value, |
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257 } | 261 } |
258 | 262 |
259 #endif // defined(__x86_64__) | 263 #endif // defined(__x86_64__) |
260 | 264 |
261 } // namespace base::subtle | 265 } // namespace base::subtle |
262 } // namespace base | 266 } // namespace base |
263 | 267 |
264 #undef ATOMICOPS_COMPILER_BARRIER | 268 #undef ATOMICOPS_COMPILER_BARRIER |
265 | 269 |
266 #endif // BASE_ATOMICOPS_INTERNALS_X86_GCC_H_ | 270 #endif // BASE_ATOMICOPS_INTERNALS_X86_GCC_H_ |
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