Index: it85spi.c |
diff --git a/it85spi.c b/it85spi.c |
index 2493c1f66cbd2364ce15326a397974a5c1221f3f..39bd9c9a378b105c789a9a6207adafbffbfd5e13 100644 |
--- a/it85spi.c |
+++ b/it85spi.c |
@@ -79,6 +79,8 @@ |
#define INDIRECT_WRITE(base, value) OUTB(value, (base) + 4) |
#endif /* LPC_IO */ |
+void it85xx_shutdown(void *); |
+ |
#ifdef LPC_IO |
unsigned int shm_io_base; |
#endif |
@@ -269,6 +271,9 @@ int it85xx_spi_common_init(void) |
if (superio.vendor != SUPERIO_VENDOR_ITE) |
return 1; |
+ if (register_shutdown(it85xx_shutdown, NULL)) |
+ return 1; |
+ |
#ifdef LPC_IO |
/* Get LPCPNP of SHM. That's big-endian */ |
sio_write(superio.port, LDNSEL, 0x0F); /* Set LDN to SHM (0x0F) */ |
@@ -300,7 +305,6 @@ int it85xx_spi_common_init(void) |
/* Set this as spi controller. */ |
spi_controller = SPI_CONTROLLER_IT85XX; |
- |
return 0; |
} |
@@ -342,11 +346,10 @@ int it85xx_probe_spi_flash(const char *name) |
return ret; |
} |
-int it85xx_shutdown(void) |
+void it85xx_shutdown(void *data) |
{ |
msg_pdbg("%s():%d\n", __func__, __LINE__); |
it85xx_exit_scratch_rom(); |
- return 0; |
} |
/* According to ITE 8502 document, the procedure to follow mode is following: |