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| 1 /* | 1 /* |
| 2 * This file is part of the flashrom project. | 2 * This file is part of the flashrom project. |
| 3 * | 3 * |
| 4 * Copyright (C) 2010 Google Inc. | 4 * Copyright (C) 2010 Google Inc. |
| 5 * | 5 * |
| 6 * Redistribution and use in source and binary forms, with or without | 6 * Redistribution and use in source and binary forms, with or without |
| 7 * modification, are permitted provided that the following conditions | 7 * modification, are permitted provided that the following conditions |
| 8 * are met: | 8 * are met: |
| 9 * | 9 * |
| 10 * Redistributions of source code must retain the above copyright | 10 * Redistributions of source code must retain the above copyright |
| (...skipping 24 matching lines...) Expand all Loading... | |
| 35 #if defined(__i386__) || defined(__x86_64__) | 35 #if defined(__i386__) || defined(__x86_64__) |
| 36 #include <inttypes.h> | 36 #include <inttypes.h> |
| 37 #include <string.h> | 37 #include <string.h> |
| 38 #include <unistd.h> | 38 #include <unistd.h> |
| 39 | 39 |
| 40 #include "flash.h" | 40 #include "flash.h" |
| 41 #include "chipdrivers.h" | 41 #include "chipdrivers.h" |
| 42 #include "programmer.h" | 42 #include "programmer.h" |
| 43 #include "spi.h" | 43 #include "spi.h" |
| 44 | 44 |
| 45 void mec1308_shutdown(void *); | |
| 46 | |
| 45 #define MEC1308_SIO_PORT1 0x2e | 47 #define MEC1308_SIO_PORT1 0x2e |
| 46 #define MEC1308_SIO_PORT2 0x4e | 48 #define MEC1308_SIO_PORT2 0x4e |
| 47 #define MEC1308_SIO_ENTRY_KEY 0x55 | 49 #define MEC1308_SIO_ENTRY_KEY 0x55 |
| 48 #define MEC1308_SIO_EXIT_KEY 0xaa | 50 #define MEC1308_SIO_EXIT_KEY 0xaa |
| 49 | 51 |
| 50 #define MEC1308_SIOCFG_LDN 0x07 /* LDN Bank Selector */ | 52 #define MEC1308_SIOCFG_LDN 0x07 /* LDN Bank Selector */ |
| 51 #define MEC1308_DEVICE_ID_REG 0x20 /* Device ID Register */ | 53 #define MEC1308_DEVICE_ID_REG 0x20 /* Device ID Register */ |
| 52 #define MEC1308_DEVICE_ID_VAL 0x4d /* Device ID Value */ | 54 #define MEC1308_DEVICE_ID_VAL 0x4d /* Device ID Value */ |
| 53 #define MEC1308_DEVICE_REV 0x21 /* Device Revision ID Register */ | 55 #define MEC1308_DEVICE_REV 0x21 /* Device Revision ID Register */ |
| 54 | 56 |
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| 363 | 365 |
| 364 /* | 366 /* |
| 365 * Enter SPI Pass-Thru Mode after commands which do not require access | 367 * Enter SPI Pass-Thru Mode after commands which do not require access |
| 366 * to SPI ROM are complete. We'll start by doing the exit_passthru_mode | 368 * to SPI ROM are complete. We'll start by doing the exit_passthru_mode |
| 367 * sequence, which is benign if the EC is already in passthru mode. | 369 * sequence, which is benign if the EC is already in passthru mode. |
| 368 */ | 370 */ |
| 369 mec1308_exit_passthru_mode(); | 371 mec1308_exit_passthru_mode(); |
| 370 if (enter_passthru_mode()) | 372 if (enter_passthru_mode()) |
| 371 return 1; | 373 return 1; |
| 372 | 374 |
| 373 msg_pdbg("%s(): successfully initialized mec1308\n", __func__); | 375 msg_pdbg("%s(): successfully initialized mec1308\n", __func__); |
|
Louis
2011/04/26 10:06:06
Swap this message to next line? To sync the same
dhendrix
2011/04/27 02:08:06
On second thought, I think we should do these earl
| |
| 376 register_shutdown(mec1308_shutdown, NULL); | |
| 374 return 0; | 377 return 0; |
| 375 } | 378 } |
| 376 | 379 |
| 377 int mec1308_shutdown(void) | 380 void mec1308_shutdown(void *data) |
| 378 { | 381 { |
| 379 if (spi_controller != SPI_CONTROLLER_MEC1308) | 382 if (spi_controller != SPI_CONTROLLER_MEC1308) |
| 380 » » return 0; | 383 » » return; |
| 381 | 384 |
| 382 /* Exit passthru mode before performing commands which do not affect | 385 /* Exit passthru mode before performing commands which do not affect |
| 383 the SPI ROM */ | 386 the SPI ROM */ |
| 384 mec1308_exit_passthru_mode(); | 387 mec1308_exit_passthru_mode(); |
| 385 | 388 |
| 386 /* Re-enable SMI and ACPI. | 389 /* Re-enable SMI and ACPI. |
| 387 FIXME: is there an ordering dependency? */ | 390 FIXME: is there an ordering dependency? */ |
| 388 mbx_write(MEC1308_MBX_CMD, MEC1308_CMD_SMI_ENABLE); | 391 mbx_write(MEC1308_MBX_CMD, MEC1308_CMD_SMI_ENABLE); |
| 389 mbx_write(MEC1308_MBX_CMD, MEC1308_CMD_ACPI_ENABLE); | 392 mbx_write(MEC1308_MBX_CMD, MEC1308_CMD_ACPI_ENABLE); |
| 390 | |
| 391 return 0; | |
| 392 } | 393 } |
| 393 | 394 |
| 394 int mec1308_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len) | 395 int mec1308_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len) |
| 395 { | 396 { |
| 396 return spi_read_chunked(flash, buf, start, len, flash->page_size); | 397 return spi_read_chunked(flash, buf, start, len, flash->page_size); |
| 397 } | 398 } |
| 398 | 399 |
| 399 int mec1308_spi_write_256(struct flashchip *flash, | 400 int mec1308_spi_write_256(struct flashchip *flash, |
| 400 uint8_t *buf, int start, int len) | 401 uint8_t *buf, int start, int len) |
| 401 { | 402 { |
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| 436 mbx_write(MEC1308_MBX_CMD, MEC1308_CMD_PASSTHRU_READ); | 437 mbx_write(MEC1308_MBX_CMD, MEC1308_CMD_PASSTHRU_READ); |
| 437 readarr[i] = mbx_read(MEC1308_MBX_DATA_START); | 438 readarr[i] = mbx_read(MEC1308_MBX_DATA_START); |
| 438 } | 439 } |
| 439 | 440 |
| 440 if (mec1308_chip_deselect()) | 441 if (mec1308_chip_deselect()) |
| 441 return 1; | 442 return 1; |
| 442 | 443 |
| 443 return 0; | 444 return 0; |
| 444 } | 445 } |
| 445 #endif | 446 #endif |
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