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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 1179 if (regop == 4) { // SIB byte present. | 1179 if (regop == 4) { // SIB byte present. |
| 1180 current++; | 1180 current++; |
| 1181 } | 1181 } |
| 1182 if (mod == 1) { // Byte displacement. | 1182 if (mod == 1) { // Byte displacement. |
| 1183 current += 1; | 1183 current += 1; |
| 1184 } else if (mod == 2) { // 32-bit displacement. | 1184 } else if (mod == 2) { // 32-bit displacement. |
| 1185 current += 4; | 1185 current += 4; |
| 1186 } // else no immediate displacement. | 1186 } // else no immediate displacement. |
| 1187 AppendToBuffer("nop"); | 1187 AppendToBuffer("nop"); |
| 1188 | 1188 |
| 1189 } else if (opcode == 28) { | 1189 } else if (opcode == 0x28) { |
| 1190 // movaps xmm, xmm/m128 | 1190 // movaps xmm, xmm/m128 |
| 1191 int mod, regop, rm; | 1191 int mod, regop, rm; |
| 1192 get_modrm(*current, &mod, ®op, &rm); | 1192 get_modrm(*current, &mod, ®op, &rm); |
| 1193 AppendToBuffer("movaps %s, ", NameOfXMMRegister(regop)); | 1193 AppendToBuffer("movaps %s, ", NameOfXMMRegister(regop)); |
| 1194 current += PrintRightXMMOperand(current); | 1194 current += PrintRightXMMOperand(current); |
| 1195 | 1195 |
| 1196 } else if (opcode == 29) { | 1196 } else if (opcode == 0x29) { |
| 1197 // movaps xmm/m128, xmm | 1197 // movaps xmm/m128, xmm |
| 1198 int mod, regop, rm; | 1198 int mod, regop, rm; |
| 1199 get_modrm(*current, &mod, ®op, &rm); | 1199 get_modrm(*current, &mod, ®op, &rm); |
| 1200 AppendToBuffer("movaps"); | 1200 AppendToBuffer("movaps "); |
| 1201 current += PrintRightXMMOperand(current); | 1201 current += PrintRightXMMOperand(current); |
| 1202 AppendToBuffer(", %s", NameOfXMMRegister(regop)); | 1202 AppendToBuffer(", %s", NameOfXMMRegister(regop)); |
| 1203 | 1203 |
| 1204 } else if (opcode == 0xA2 || opcode == 0x31) { | 1204 } else if (opcode == 0xA2 || opcode == 0x31) { |
| 1205 // RDTSC or CPUID | 1205 // RDTSC or CPUID |
| 1206 AppendToBuffer("%s", mnemonic); | 1206 AppendToBuffer("%s", mnemonic); |
| 1207 | 1207 |
| 1208 } else if ((opcode & 0xF0) == 0x40) { | 1208 } else if ((opcode & 0xF0) == 0x40) { |
| 1209 // CMOVcc: conditional move. | 1209 // CMOVcc: conditional move. |
| 1210 int condition = opcode & 0x0F; | 1210 int condition = opcode & 0x0F; |
| 1211 const InstructionDesc& idesc = cmov_instructions[condition]; | 1211 const InstructionDesc& idesc = cmov_instructions[condition]; |
| 1212 byte_size_operand_ = idesc.byte_size_operation; | 1212 byte_size_operand_ = idesc.byte_size_operation; |
| 1213 current += PrintOperands(idesc.mnem, idesc.op_order_, current); | 1213 current += PrintOperands(idesc.mnem, idesc.op_order_, current); |
| 1214 | 1214 |
| 1215 } else if (opcode == 57) { | 1215 } else if (opcode == 0x57) { |
| 1216 // xoprps xmm, xmm/m128 | 1216 // xorps xmm, xmm/m128 |
| 1217 int mod, regop, rm; | 1217 int mod, regop, rm; |
| 1218 get_modrm(*current, &mod, ®op, &rm); | 1218 get_modrm(*current, &mod, ®op, &rm); |
| 1219 AppendToBuffer("xorps %s, ", NameOfXMMRegister(regop)); | 1219 AppendToBuffer("xorps %s, ", NameOfXMMRegister(regop)); |
| 1220 current += PrintRightXMMOperand(current); | 1220 current += PrintRightXMMOperand(current); |
| 1221 | 1221 |
| 1222 } else if ((opcode & 0xF0) == 0x80) { | 1222 } else if ((opcode & 0xF0) == 0x80) { |
| 1223 // Jcc: Conditional jump (branch). | 1223 // Jcc: Conditional jump (branch). |
| 1224 current = data + JumpConditional(data); | 1224 current = data + JumpConditional(data); |
| 1225 | 1225 |
| 1226 } else if (opcode == 0xBE || opcode == 0xBF || opcode == 0xB6 || | 1226 } else if (opcode == 0xBE || opcode == 0xBF || opcode == 0xB6 || |
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| 1823 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { | 1823 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { |
| 1824 fprintf(f, " "); | 1824 fprintf(f, " "); |
| 1825 } | 1825 } |
| 1826 fprintf(f, " %s\n", buffer.start()); | 1826 fprintf(f, " %s\n", buffer.start()); |
| 1827 } | 1827 } |
| 1828 } | 1828 } |
| 1829 | 1829 |
| 1830 } // namespace disasm | 1830 } // namespace disasm |
| 1831 | 1831 |
| 1832 #endif // V8_TARGET_ARCH_X64 | 1832 #endif // V8_TARGET_ARCH_X64 |
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