Revert MMIO space writes on shutdown as needed.

chipset_enable.c

 /*
  * This file is part of the flashrom project.
  *
  * Copyright (C) 2000 Silicon Integrated System Corporation
  * Copyright (C) 2005-2009 coresystems GmbH
  * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
  * Copyright (C) 2007,2008,2009 Carl-Daniel Hailfinger
  * Copyright (C) 2009 Kontron Modular Computers GmbH
  *
  * This program is free software; you can redistribute it and/or modify
@@ skipping 429 matching lines @@
         msg_pdbg("\nRoot Complex Register Block address = 0x%x\n", tmp);
 
         /* Map RCBA to virtual memory */
         rcrb = physmap("ICH RCRB", tmp, 0x4000);
 
         /* Set BBS (Boot BIOS Straps) field of GCS register. */
         gcs = mmio_readl(rcrb + 0x3410);
         if (target_bus == CHIP_BUSTYPE_LPC) {
                 msg_pdbg("Setting BBS to LPC\n");
                 gcs = (gcs & ~0xc00) | (0x3 << 10);
-                mmio_writel(gcs, rcrb + 0x3410);
+                rmmio_writel(gcs, rcrb + 0x3410);
         } else if (target_bus == CHIP_BUSTYPE_SPI) {
                 msg_pdbg("Setting BBS to SPI\n");
                 gcs = (gcs & ~0xc00) | (0x1 << 10);
-                mmio_writel(gcs, rcrb + 0x3410);
+                rmmio_writel(gcs, rcrb + 0x3410);
         }
 
         msg_pdbg("GCS = 0x%x: ", gcs);
         msg_pdbg("BIOS Interface Lock-Down: %sabled, ",
                      (gcs & 0x1) ? "en" : "dis");
         bbs = (gcs >> 10) & 0x3;
         msg_pdbg("BOOT BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]);
 
         buc = mmio_readb(rcrb + 0x3414);
         msg_pdbg("Top Swap : %s\n",
@@ skipping 803 matching lines @@
                 }
 
                 ret = 0;
                 break;
                 /* For unexpected second device, the chipset_flash_enable()
                    has shown the warning message. */
         }
 
         return ret;
 }