OLD | NEW |
1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
(...skipping 1230 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1241 } | 1241 } |
1242 } | 1242 } |
1243 } | 1243 } |
1244 | 1244 |
1245 | 1245 |
1246 void MacroAssembler::SmiAdd(Register dst, | 1246 void MacroAssembler::SmiAdd(Register dst, |
1247 Register src1, | 1247 Register src1, |
1248 Register src2) { | 1248 Register src2) { |
1249 // No overflow checking. Use only when it's known that | 1249 // No overflow checking. Use only when it's known that |
1250 // overflowing is impossible. | 1250 // overflowing is impossible. |
1251 ASSERT(!dst.is(src2)); | |
1252 if (!dst.is(src1)) { | 1251 if (!dst.is(src1)) { |
1253 movq(dst, src1); | 1252 if (emit_debug_code()) { |
| 1253 movq(kScratchRegister, src1); |
| 1254 addq(kScratchRegister, src2); |
| 1255 Check(no_overflow, "Smi addition overflow"); |
| 1256 } |
| 1257 lea(dst, Operand(src1, src2, times_1, 0)); |
| 1258 } else { |
| 1259 addq(dst, src2); |
| 1260 Assert(no_overflow, "Smi addition overflow"); |
1254 } | 1261 } |
1255 addq(dst, src2); | |
1256 Assert(no_overflow, "Smi addition overflow"); | |
1257 } | 1262 } |
1258 | 1263 |
1259 | 1264 |
1260 void MacroAssembler::SmiSub(Register dst, Register src1, Register src2) { | 1265 void MacroAssembler::SmiSub(Register dst, Register src1, Register src2) { |
1261 // No overflow checking. Use only when it's known that | 1266 // No overflow checking. Use only when it's known that |
1262 // overflowing is impossible (e.g., subtracting two positive smis). | 1267 // overflowing is impossible (e.g., subtracting two positive smis). |
1263 ASSERT(!dst.is(src2)); | 1268 ASSERT(!dst.is(src2)); |
1264 if (!dst.is(src1)) { | 1269 if (!dst.is(src1)) { |
1265 movq(dst, src1); | 1270 movq(dst, src1); |
1266 } | 1271 } |
(...skipping 1638 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2905 CPU::FlushICache(address_, size_); | 2910 CPU::FlushICache(address_, size_); |
2906 | 2911 |
2907 // Check that the code was patched as expected. | 2912 // Check that the code was patched as expected. |
2908 ASSERT(masm_.pc_ == address_ + size_); | 2913 ASSERT(masm_.pc_ == address_ + size_); |
2909 ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap); | 2914 ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap); |
2910 } | 2915 } |
2911 | 2916 |
2912 } } // namespace v8::internal | 2917 } } // namespace v8::internal |
2913 | 2918 |
2914 #endif // V8_TARGET_ARCH_X64 | 2919 #endif // V8_TARGET_ARCH_X64 |
OLD | NEW |