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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 148 | 148 |
| 149 // The currently executing Simulator instance. Potentially there can be one | 149 // The currently executing Simulator instance. Potentially there can be one |
| 150 // for each native thread. | 150 // for each native thread. |
| 151 static Simulator* current(v8::internal::Isolate* isolate); | 151 static Simulator* current(v8::internal::Isolate* isolate); |
| 152 | 152 |
| 153 // Accessors for register state. Reading the pc value adheres to the ARM | 153 // Accessors for register state. Reading the pc value adheres to the ARM |
| 154 // architecture specification and is off by a 8 from the currently executing | 154 // architecture specification and is off by a 8 from the currently executing |
| 155 // instruction. | 155 // instruction. |
| 156 void set_register(int reg, int32_t value); | 156 void set_register(int reg, int32_t value); |
| 157 int32_t get_register(int reg) const; | 157 int32_t get_register(int reg) const; |
| 158 double get_double_from_register_pair(int reg); |
| 158 void set_dw_register(int dreg, const int* dbl); | 159 void set_dw_register(int dreg, const int* dbl); |
| 159 | 160 |
| 160 // Support for VFP. | 161 // Support for VFP. |
| 161 void set_s_register(int reg, unsigned int value); | 162 void set_s_register(int reg, unsigned int value); |
| 162 unsigned int get_s_register(int reg) const; | 163 unsigned int get_s_register(int reg) const; |
| 163 void set_d_register_from_double(int dreg, const double& dbl); | 164 void set_d_register_from_double(int dreg, const double& dbl); |
| 164 double get_double_from_d_register(int dreg); | 165 double get_double_from_d_register(int dreg); |
| 165 void set_s_register_from_float(int sreg, const float dbl); | 166 void set_s_register_from_float(int sreg, const float dbl); |
| 166 float get_float_from_s_register(int sreg); | 167 float get_float_from_s_register(int sreg); |
| 167 void set_s_register_from_sinteger(int reg, const int value); | 168 void set_s_register_from_sinteger(int reg, const int value); |
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| 404 | 405 |
| 405 static inline void UnregisterCTryCatch() { | 406 static inline void UnregisterCTryCatch() { |
| 406 Simulator::current(Isolate::Current())->PopAddress(); | 407 Simulator::current(Isolate::Current())->PopAddress(); |
| 407 } | 408 } |
| 408 }; | 409 }; |
| 409 | 410 |
| 410 } } // namespace v8::internal | 411 } } // namespace v8::internal |
| 411 | 412 |
| 412 #endif // !defined(USE_SIMULATOR) | 413 #endif // !defined(USE_SIMULATOR) |
| 413 #endif // V8_ARM_SIMULATOR_ARM_H_ | 414 #endif // V8_ARM_SIMULATOR_ARM_H_ |
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