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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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60 void Debug(); | 60 void Debug(); |
61 | 61 |
62 private: | 62 private: |
63 static const Instr kBreakpointInstr = | 63 static const Instr kBreakpointInstr = |
64 (al | (7*B25) | (1*B24) | kBreakpoint); | 64 (al | (7*B25) | (1*B24) | kBreakpoint); |
65 static const Instr kNopInstr = (al | (13*B21)); | 65 static const Instr kNopInstr = (al | (13*B21)); |
66 | 66 |
67 Simulator* sim_; | 67 Simulator* sim_; |
68 | 68 |
69 int32_t GetRegisterValue(int regnum); | 69 int32_t GetRegisterValue(int regnum); |
| 70 double GetRegisterPairDoubleValue(int regnum); |
70 double GetVFPDoubleRegisterValue(int regnum); | 71 double GetVFPDoubleRegisterValue(int regnum); |
71 bool GetValue(const char* desc, int32_t* value); | 72 bool GetValue(const char* desc, int32_t* value); |
72 bool GetVFPSingleValue(const char* desc, float* value); | 73 bool GetVFPSingleValue(const char* desc, float* value); |
73 bool GetVFPDoubleValue(const char* desc, double* value); | 74 bool GetVFPDoubleValue(const char* desc, double* value); |
74 | 75 |
75 // Set or delete a breakpoint. Returns true if successful. | 76 // Set or delete a breakpoint. Returns true if successful. |
76 bool SetBreakpoint(Instruction* breakpc); | 77 bool SetBreakpoint(Instruction* breakpc); |
77 bool DeleteBreakpoint(Instruction* breakpc); | 78 bool DeleteBreakpoint(Instruction* breakpc); |
78 | 79 |
79 // Undo and redo all breakpoints. This is needed to bracket disassembly and | 80 // Undo and redo all breakpoints. This is needed to bracket disassembly and |
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161 | 162 |
162 int32_t ArmDebugger::GetRegisterValue(int regnum) { | 163 int32_t ArmDebugger::GetRegisterValue(int regnum) { |
163 if (regnum == kPCRegister) { | 164 if (regnum == kPCRegister) { |
164 return sim_->get_pc(); | 165 return sim_->get_pc(); |
165 } else { | 166 } else { |
166 return sim_->get_register(regnum); | 167 return sim_->get_register(regnum); |
167 } | 168 } |
168 } | 169 } |
169 | 170 |
170 | 171 |
| 172 double ArmDebugger::GetRegisterPairDoubleValue(int regnum) { |
| 173 return sim_->get_double_from_register_pair(regnum); |
| 174 } |
| 175 |
| 176 |
171 double ArmDebugger::GetVFPDoubleRegisterValue(int regnum) { | 177 double ArmDebugger::GetVFPDoubleRegisterValue(int regnum) { |
172 return sim_->get_double_from_d_register(regnum); | 178 return sim_->get_double_from_d_register(regnum); |
173 } | 179 } |
174 | 180 |
175 | 181 |
176 bool ArmDebugger::GetValue(const char* desc, int32_t* value) { | 182 bool ArmDebugger::GetValue(const char* desc, int32_t* value) { |
177 int regnum = Registers::Number(desc); | 183 int regnum = Registers::Number(desc); |
178 if (regnum != kNoRegister) { | 184 if (regnum != kNoRegister) { |
179 *value = GetRegisterValue(regnum); | 185 *value = GetRegisterValue(regnum); |
180 return true; | 186 return true; |
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298 "%" XSTR(ARG_SIZE) "s", | 304 "%" XSTR(ARG_SIZE) "s", |
299 cmd, arg1, arg2); | 305 cmd, arg1, arg2); |
300 if ((strcmp(cmd, "si") == 0) || (strcmp(cmd, "stepi") == 0)) { | 306 if ((strcmp(cmd, "si") == 0) || (strcmp(cmd, "stepi") == 0)) { |
301 sim_->InstructionDecode(reinterpret_cast<Instruction*>(sim_->get_pc())); | 307 sim_->InstructionDecode(reinterpret_cast<Instruction*>(sim_->get_pc())); |
302 } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) { | 308 } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) { |
303 // Execute the one instruction we broke at with breakpoints disabled. | 309 // Execute the one instruction we broke at with breakpoints disabled. |
304 sim_->InstructionDecode(reinterpret_cast<Instruction*>(sim_->get_pc())); | 310 sim_->InstructionDecode(reinterpret_cast<Instruction*>(sim_->get_pc())); |
305 // Leave the debugger shell. | 311 // Leave the debugger shell. |
306 done = true; | 312 done = true; |
307 } else if ((strcmp(cmd, "p") == 0) || (strcmp(cmd, "print") == 0)) { | 313 } else if ((strcmp(cmd, "p") == 0) || (strcmp(cmd, "print") == 0)) { |
308 if (argc == 2) { | 314 if (argc == 2 || (argc == 3 && strcmp(arg2, "fp") == 0)) { |
309 int32_t value; | 315 int32_t value; |
310 float svalue; | 316 float svalue; |
311 double dvalue; | 317 double dvalue; |
312 if (strcmp(arg1, "all") == 0) { | 318 if (strcmp(arg1, "all") == 0) { |
313 for (int i = 0; i < kNumRegisters; i++) { | 319 for (int i = 0; i < kNumRegisters; i++) { |
314 value = GetRegisterValue(i); | 320 value = GetRegisterValue(i); |
315 PrintF("%3s: 0x%08x %10d\n", Registers::Name(i), value, value); | 321 PrintF("%3s: 0x%08x %10d", Registers::Name(i), value, value); |
| 322 if ((argc == 3 && strcmp(arg2, "fp") == 0) && |
| 323 i < 8 && |
| 324 (i % 2) == 0) { |
| 325 dvalue = GetRegisterPairDoubleValue(i); |
| 326 PrintF(" (%f)\n", dvalue); |
| 327 } else { |
| 328 PrintF("\n"); |
| 329 } |
316 } | 330 } |
317 for (int i = 0; i < kNumVFPDoubleRegisters; i++) { | 331 for (int i = 0; i < kNumVFPDoubleRegisters; i++) { |
318 dvalue = GetVFPDoubleRegisterValue(i); | 332 dvalue = GetVFPDoubleRegisterValue(i); |
319 uint64_t as_words = BitCast<uint64_t>(dvalue); | 333 uint64_t as_words = BitCast<uint64_t>(dvalue); |
320 PrintF("%3s: %f 0x%08x %08x\n", | 334 PrintF("%3s: %f 0x%08x %08x\n", |
321 VFPRegisters::Name(i, true), | 335 VFPRegisters::Name(i, true), |
322 dvalue, | 336 dvalue, |
323 static_cast<uint32_t>(as_words >> 32), | 337 static_cast<uint32_t>(as_words >> 32), |
324 static_cast<uint32_t>(as_words & 0xffffffff)); | 338 static_cast<uint32_t>(as_words & 0xffffffff)); |
325 } | 339 } |
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543 PrintF("Trace of executed instructions is %s\n", | 557 PrintF("Trace of executed instructions is %s\n", |
544 ::v8::internal::FLAG_trace_sim ? "on" : "off"); | 558 ::v8::internal::FLAG_trace_sim ? "on" : "off"); |
545 } else if ((strcmp(cmd, "h") == 0) || (strcmp(cmd, "help") == 0)) { | 559 } else if ((strcmp(cmd, "h") == 0) || (strcmp(cmd, "help") == 0)) { |
546 PrintF("cont\n"); | 560 PrintF("cont\n"); |
547 PrintF(" continue execution (alias 'c')\n"); | 561 PrintF(" continue execution (alias 'c')\n"); |
548 PrintF("stepi\n"); | 562 PrintF("stepi\n"); |
549 PrintF(" step one instruction (alias 'si')\n"); | 563 PrintF(" step one instruction (alias 'si')\n"); |
550 PrintF("print <register>\n"); | 564 PrintF("print <register>\n"); |
551 PrintF(" print register content (alias 'p')\n"); | 565 PrintF(" print register content (alias 'p')\n"); |
552 PrintF(" use register name 'all' to print all registers\n"); | 566 PrintF(" use register name 'all' to print all registers\n"); |
| 567 PrintF(" add argument 'fp' to print register pair double values\n"); |
553 PrintF("printobject <register>\n"); | 568 PrintF("printobject <register>\n"); |
554 PrintF(" print an object from a register (alias 'po')\n"); | 569 PrintF(" print an object from a register (alias 'po')\n"); |
555 PrintF("flags\n"); | 570 PrintF("flags\n"); |
556 PrintF(" print flags\n"); | 571 PrintF(" print flags\n"); |
557 PrintF("stack [<words>]\n"); | 572 PrintF("stack [<words>]\n"); |
558 PrintF(" dump stack content, default dump 10 words)\n"); | 573 PrintF(" dump stack content, default dump 10 words)\n"); |
559 PrintF("mem <address> [<words>]\n"); | 574 PrintF("mem <address> [<words>]\n"); |
560 PrintF(" dump memory content, default dump 10 words)\n"); | 575 PrintF(" dump memory content, default dump 10 words)\n"); |
561 PrintF("disasm [<instructions>]\n"); | 576 PrintF("disasm [<instructions>]\n"); |
562 PrintF("disasm [<address/register>]\n"); | 577 PrintF("disasm [<address/register>]\n"); |
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866 int32_t Simulator::get_register(int reg) const { | 881 int32_t Simulator::get_register(int reg) const { |
867 ASSERT((reg >= 0) && (reg < num_registers)); | 882 ASSERT((reg >= 0) && (reg < num_registers)); |
868 // Stupid code added to avoid bug in GCC. | 883 // Stupid code added to avoid bug in GCC. |
869 // See: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43949 | 884 // See: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43949 |
870 if (reg >= num_registers) return 0; | 885 if (reg >= num_registers) return 0; |
871 // End stupid code. | 886 // End stupid code. |
872 return registers_[reg] + ((reg == pc) ? Instruction::kPCReadOffset : 0); | 887 return registers_[reg] + ((reg == pc) ? Instruction::kPCReadOffset : 0); |
873 } | 888 } |
874 | 889 |
875 | 890 |
| 891 double Simulator::get_double_from_register_pair(int reg) { |
| 892 ASSERT((reg >= 0) && (reg < num_registers) && ((reg % 2) == 0)); |
| 893 |
| 894 double dm_val = 0.0; |
| 895 // Read the bits from the unsigned integer register_[] array |
| 896 // into the double precision floating point value and return it. |
| 897 char buffer[2 * sizeof(vfp_register[0])]; |
| 898 memcpy(buffer, ®isters_[reg], 2 * sizeof(registers_[0])); |
| 899 memcpy(&dm_val, buffer, 2 * sizeof(registers_[0])); |
| 900 return(dm_val); |
| 901 } |
| 902 |
| 903 |
876 void Simulator::set_dw_register(int dreg, const int* dbl) { | 904 void Simulator::set_dw_register(int dreg, const int* dbl) { |
877 ASSERT((dreg >= 0) && (dreg < num_d_registers)); | 905 ASSERT((dreg >= 0) && (dreg < num_d_registers)); |
878 registers_[dreg] = dbl[0]; | 906 registers_[dreg] = dbl[0]; |
879 registers_[dreg + 1] = dbl[1]; | 907 registers_[dreg + 1] = dbl[1]; |
880 } | 908 } |
881 | 909 |
882 | 910 |
883 // Raw access to the PC register. | 911 // Raw access to the PC register. |
884 void Simulator::set_pc(int32_t value) { | 912 void Simulator::set_pc(int32_t value) { |
885 pc_modified_ = true; | 913 pc_modified_ = true; |
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3269 uintptr_t address = *stack_slot; | 3297 uintptr_t address = *stack_slot; |
3270 set_register(sp, current_sp + sizeof(uintptr_t)); | 3298 set_register(sp, current_sp + sizeof(uintptr_t)); |
3271 return address; | 3299 return address; |
3272 } | 3300 } |
3273 | 3301 |
3274 } } // namespace v8::internal | 3302 } } // namespace v8::internal |
3275 | 3303 |
3276 #endif // USE_SIMULATOR | 3304 #endif // USE_SIMULATOR |
3277 | 3305 |
3278 #endif // V8_TARGET_ARCH_ARM | 3306 #endif // V8_TARGET_ARCH_ARM |
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