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Side by Side Diff: arch/arm/mach-tegra/board-seaboard.c

Issue 6825076: CHROMIUM: tegra: seaboard: fix ULPI transceiver clock (Closed) Base URL: ssh://git@gitrw.chromium.org:9222/kernel-next.git@chromeos-2.6.37
Patch Set: Created 9 years, 8 months ago
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1 /* 1 /*
2 * arch/arm/mach-tegra/board-seaboard.c 2 * arch/arm/mach-tegra/board-seaboard.c
3 * 3 *
4 * Copyright (c) 2010, NVIDIA Corporation. 4 * Copyright (c) 2010, NVIDIA Corporation.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or 8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version. 9 * (at your option) any later version.
10 * 10 *
(...skipping 96 matching lines...) Expand 10 before | Expand all | Expand 10 after
107 { "i2s1", "pll_a_out0", 11289600, false}, 107 { "i2s1", "pll_a_out0", 11289600, false},
108 { "audio", "pll_a_out0", 11289600, false}, 108 { "audio", "pll_a_out0", 11289600, false},
109 { "audio_2x", "audio", 22579200, false}, 109 { "audio_2x", "audio", 22579200, false},
110 { "pll_p_out2", "pll_p", 48000000, true}, 110 { "pll_p_out2", "pll_p", 48000000, true},
111 { "pll_p_out3", "pll_p", 72000000, true}, 111 { "pll_p_out3", "pll_p", 72000000, true},
112 { "i2c1_i2c", "pll_p_out3", 72000000, true}, 112 { "i2c1_i2c", "pll_p_out3", 72000000, true},
113 { "i2c2_i2c", "pll_p_out3", 72000000, true}, 113 { "i2c2_i2c", "pll_p_out3", 72000000, true},
114 { "i2c3_i2c", "pll_p_out3", 72000000, true}, 114 { "i2c3_i2c", "pll_p_out3", 72000000, true},
115 { "dvc_i2c", "pll_p_out3", 72000000, true}, 115 { "dvc_i2c", "pll_p_out3", 72000000, true},
116 { "csi", "pll_p_out3", 72000000, false}, 116 { "csi", "pll_p_out3", 72000000, false},
117 » { "pll_p_out4",»"pll_p",» 108000000,» true}, 117 » { "pll_p_out4",»"pll_p",» 24000000,» true},
118 » { "sclk",» "pll_p_out4",» 108000000,» true}, 118 » { "sclk",» "pll_c_out1",» 108000000,» true},
119 { "hclk", "sclk", 108000000, true}, 119 { "hclk", "sclk", 108000000, true},
120 { "pclk", "hclk", 54000000, true}, 120 { "pclk", "hclk", 54000000, true},
121 { "spdif_in", "pll_p", 36000000, false}, 121 { "spdif_in", "pll_p", 36000000, false},
122 { "csite", "pll_p", 144000000, true}, 122 { "csite", "pll_p", 144000000, true},
123 { "host1x", "pll_p", 144000000, false}, 123 { "host1x", "pll_p", 144000000, false},
124 { "disp1", "pll_p", 216000000, false}, 124 { "disp1", "pll_p", 216000000, false},
125 { "pll_d", "clk_m", 1000000, false}, 125 { "pll_d", "clk_m", 1000000, false},
126 { "pll_d_out0", "pll_d", 500000, false}, 126 { "pll_d_out0", "pll_d", 500000, false},
127 { "dsi", "pll_d", 1000000, false}, 127 { "dsi", "pll_d", 1000000, false},
128 { "pll_u", "clk_m", 480000000, true}, 128 { "pll_u", "clk_m", 480000000, true},
(...skipping 771 matching lines...) Expand 10 before | Expand all | Expand 10 after
900 .timer = &tegra_timer, 900 .timer = &tegra_timer,
901 MACHINE_END 901 MACHINE_END
902 902
903 MACHINE_START(WARIO, "wario") 903 MACHINE_START(WARIO, "wario")
904 .boot_params = 0x00000100, 904 .boot_params = 0x00000100,
905 .init_irq = tegra_init_irq, 905 .init_irq = tegra_init_irq,
906 .init_machine = tegra_wario_init, 906 .init_machine = tegra_wario_init,
907 .map_io = tegra_map_common_io, 907 .map_io = tegra_map_common_io,
908 .timer = &tegra_timer, 908 .timer = &tegra_timer,
909 MACHINE_END 909 MACHINE_END
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