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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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645 switch (regop) { | 645 switch (regop) { |
646 case 0: | 646 case 0: |
647 mnem = "add"; | 647 mnem = "add"; |
648 break; | 648 break; |
649 case 1: | 649 case 1: |
650 mnem = "or"; | 650 mnem = "or"; |
651 break; | 651 break; |
652 case 2: | 652 case 2: |
653 mnem = "adc"; | 653 mnem = "adc"; |
654 break; | 654 break; |
| 655 case 3: |
| 656 mnem = "sbb"; |
| 657 break; |
655 case 4: | 658 case 4: |
656 mnem = "and"; | 659 mnem = "and"; |
657 break; | 660 break; |
658 case 5: | 661 case 5: |
659 mnem = "sub"; | 662 mnem = "sub"; |
660 break; | 663 break; |
661 case 6: | 664 case 6: |
662 mnem = "xor"; | 665 mnem = "xor"; |
663 break; | 666 break; |
664 case 7: | 667 case 7: |
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1495 if (reg == 0) { | 1498 if (reg == 0) { |
1496 AppendToBuffer("nop"); // Common name for xchg rax,rax. | 1499 AppendToBuffer("nop"); // Common name for xchg rax,rax. |
1497 } else { | 1500 } else { |
1498 AppendToBuffer("xchg%c rax, %s", | 1501 AppendToBuffer("xchg%c rax, %s", |
1499 operand_size_code(), | 1502 operand_size_code(), |
1500 NameOfCPURegister(reg)); | 1503 NameOfCPURegister(reg)); |
1501 } | 1504 } |
1502 data++; | 1505 data++; |
1503 } | 1506 } |
1504 break; | 1507 break; |
1505 | 1508 case 0xB0: |
| 1509 case 0xB1: |
| 1510 case 0xB2: |
| 1511 case 0xB3: |
| 1512 case 0xB4: |
| 1513 case 0xB5: |
| 1514 case 0xB6: |
| 1515 case 0xB7: |
| 1516 case 0xB8: |
| 1517 case 0xB9: |
| 1518 case 0xBA: |
| 1519 case 0xBB: |
| 1520 case 0xBC: |
| 1521 case 0xBD: |
| 1522 case 0xBE: |
| 1523 case 0xBF: { |
| 1524 // mov reg8,imm8 or mov reg32,imm32 |
| 1525 byte opcode = *data; |
| 1526 data++; |
| 1527 bool is_32bit = (opcode >= 0xB8); |
| 1528 int reg = (opcode & 0x7) | (rex_b() ? 8 : 0); |
| 1529 if (is_32bit) { |
| 1530 AppendToBuffer("mov%c %s, ", |
| 1531 operand_size_code(), |
| 1532 NameOfCPURegister(reg)); |
| 1533 data += PrintImmediate(data, DOUBLEWORD_SIZE); |
| 1534 } else { |
| 1535 AppendToBuffer("movb %s, ", |
| 1536 NameOfByteCPURegister(reg)); |
| 1537 data += PrintImmediate(data, BYTE_SIZE); |
| 1538 } |
| 1539 break; |
| 1540 } |
1506 case 0xFE: { | 1541 case 0xFE: { |
1507 data++; | 1542 data++; |
1508 int mod, regop, rm; | 1543 int mod, regop, rm; |
1509 get_modrm(*data, &mod, ®op, &rm); | 1544 get_modrm(*data, &mod, ®op, &rm); |
1510 if (regop == 1) { | 1545 if (regop == 1) { |
1511 AppendToBuffer("decb "); | 1546 AppendToBuffer("decb "); |
1512 data += PrintRightByteOperand(data); | 1547 data += PrintRightByteOperand(data); |
1513 } else { | 1548 } else { |
1514 UnimplementedInstruction(); | 1549 UnimplementedInstruction(); |
1515 } | 1550 } |
| 1551 break; |
1516 } | 1552 } |
1517 break; | |
1518 | |
1519 case 0x68: | 1553 case 0x68: |
1520 AppendToBuffer("push 0x%x", *reinterpret_cast<int32_t*>(data + 1)); | 1554 AppendToBuffer("push 0x%x", *reinterpret_cast<int32_t*>(data + 1)); |
1521 data += 5; | 1555 data += 5; |
1522 break; | 1556 break; |
1523 | 1557 |
1524 case 0x6A: | 1558 case 0x6A: |
1525 AppendToBuffer("push 0x%x", *reinterpret_cast<int8_t*>(data + 1)); | 1559 AppendToBuffer("push 0x%x", *reinterpret_cast<int8_t*>(data + 1)); |
1526 data += 2; | 1560 data += 2; |
1527 break; | 1561 break; |
1528 | 1562 |
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1743 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { | 1777 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { |
1744 fprintf(f, " "); | 1778 fprintf(f, " "); |
1745 } | 1779 } |
1746 fprintf(f, " %s\n", buffer.start()); | 1780 fprintf(f, " %s\n", buffer.start()); |
1747 } | 1781 } |
1748 } | 1782 } |
1749 | 1783 |
1750 } // namespace disasm | 1784 } // namespace disasm |
1751 | 1785 |
1752 #endif // V8_TARGET_ARCH_X64 | 1786 #endif // V8_TARGET_ARCH_X64 |
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