| Index: src/arm/assembler-arm.cc
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| diff --git a/src/arm/assembler-arm.cc b/src/arm/assembler-arm.cc
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| index 48000b4c8f1c2559c067a0003b4bd5400ffc2767..73dddfd43eb53820f94f5f9381026dc84295ad7d 100644
|
| --- a/src/arm/assembler-arm.cc
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| +++ b/src/arm/assembler-arm.cc
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| @@ -1824,45 +1824,6 @@ void Assembler::ldc2(Coprocessor coproc,
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| }
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|
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| -void Assembler::stc(Coprocessor coproc,
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| - CRegister crd,
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| - const MemOperand& dst,
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| - LFlag l,
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| - Condition cond) {
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| - addrmod5(cond | B27 | B26 | l | coproc*B8, crd, dst);
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| -}
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| -
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| -
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| -void Assembler::stc(Coprocessor coproc,
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| - CRegister crd,
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| - Register rn,
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| - int option,
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| - LFlag l,
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| - Condition cond) {
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| - // Unindexed addressing.
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| - ASSERT(is_uint8(option));
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| - emit(cond | B27 | B26 | U | l | rn.code()*B16 | crd.code()*B12 |
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| - coproc*B8 | (option & 255));
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| -}
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| -
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| -
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| -void Assembler::stc2(Coprocessor
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| - coproc, CRegister crd,
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| - const MemOperand& dst,
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| - LFlag l) { // v5 and above
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| - stc(coproc, crd, dst, l, kSpecialCondition);
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| -}
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| -
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| -
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| -void Assembler::stc2(Coprocessor coproc,
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| - CRegister crd,
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| - Register rn,
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| - int option,
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| - LFlag l) { // v5 and above
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| - stc(coproc, crd, rn, option, l, kSpecialCondition);
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| -}
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| -
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| -
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| // Support for VFP.
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|
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| void Assembler::vldr(const DwVfpRegister dst,
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|