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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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788 __ neg(dividend); | 788 __ neg(dividend); |
789 if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) { | 789 if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) { |
790 __ j(not_zero, &done); | 790 __ j(not_zero, &done); |
791 DeoptimizeIf(no_condition, instr->environment()); | 791 DeoptimizeIf(no_condition, instr->environment()); |
792 } | 792 } |
793 __ bind(&positive_dividend); | 793 __ bind(&positive_dividend); |
794 __ and_(dividend, divisor - 1); | 794 __ and_(dividend, divisor - 1); |
795 __ bind(&done); | 795 __ bind(&done); |
796 } else { | 796 } else { |
797 LOperand* right = instr->InputAt(1); | 797 LOperand* right = instr->InputAt(1); |
798 NearLabel done, remainder_eq_dividend, slow, do_subtraction, both_positive; | |
Søren Thygesen Gjesse
2011/04/27 14:11:43
Please set up Register variables for left as well:
| |
798 ASSERT(ToRegister(instr->InputAt(0)).is(eax)); | 799 ASSERT(ToRegister(instr->InputAt(0)).is(eax)); |
799 ASSERT(ToRegister(instr->result()).is(edx)); | 800 ASSERT(ToRegister(instr->result()).is(edx)); |
800 | 801 |
801 Register right_reg = ToRegister(right); | 802 Register right_reg = ToRegister(right); |
802 ASSERT(!right_reg.is(eax)); | 803 ASSERT(!right_reg.is(eax)); |
803 ASSERT(!right_reg.is(edx)); | 804 ASSERT(!right_reg.is(edx)); |
804 | 805 |
805 // Check for x % 0. | 806 // Check for x % 0. |
806 if (instr->hydrogen()->CheckFlag(HValue::kCanBeDivByZero)) { | 807 if (instr->hydrogen()->CheckFlag(HValue::kCanBeDivByZero)) { |
807 __ test(right_reg, ToOperand(right)); | 808 __ test(right_reg, ToOperand(right)); |
808 DeoptimizeIf(zero, instr->environment()); | 809 DeoptimizeIf(zero, instr->environment()); |
809 } | 810 } |
810 | 811 |
812 __ test(eax, Operand(eax)); | |
813 __ j(zero, &remainder_eq_dividend); | |
814 __ j(sign, &slow); | |
815 | |
816 __ test(right_reg, Operand(right_reg)); | |
817 __ j(not_sign, &both_positive); | |
818 // The sign of the divisor doesn't matter. | |
819 __ neg(right_reg); | |
820 | |
821 __ bind(&both_positive); | |
822 // If the dividend is smaller than the nonnegative | |
823 // divisor, the dividend is the result. | |
824 __ cmp(eax, Operand(right_reg)); | |
825 __ j(less, &remainder_eq_dividend); | |
826 | |
827 // Check if the divisor is a PowerOfTwo integer. | |
828 Register scratch = ToRegister(instr->TempAt(0)); | |
829 __ mov(scratch, right_reg); | |
830 __ sub(Operand(scratch), Immediate(1)); | |
831 __ test(scratch, Operand(right_reg)); | |
832 __ j(not_zero, &do_subtraction); | |
833 __ and_(eax, Operand(scratch)); | |
834 __ jmp(&remainder_eq_dividend); | |
835 | |
836 __ bind(&do_subtraction); | |
837 const int kUnfolds = 3; | |
838 // Try a few subtractions of the dividend. | |
839 __ mov(scratch, eax); | |
840 for (int i = 0; i < kUnfolds; i++) { | |
841 // Reduce the dividend by the divisor. | |
842 __ sub(eax, Operand(right_reg)); | |
843 // Check if the dividend is less than the divisor. | |
844 __ cmp(eax, Operand(right_reg)); | |
845 __ j(less, &remainder_eq_dividend); | |
846 } | |
847 __ mov(eax, scratch); | |
848 | |
849 // Slow case, using idiv instruction. | |
850 __ bind(&slow); | |
811 // Sign extend to edx. | 851 // Sign extend to edx. |
812 __ cdq(); | 852 __ cdq(); |
813 | 853 |
814 // Check for (0 % -x) that will produce negative zero. | 854 // Check for (0 % -x) that will produce negative zero. |
815 if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) { | 855 if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) { |
816 NearLabel positive_left; | 856 NearLabel positive_left; |
817 NearLabel done; | 857 NearLabel done; |
818 __ test(eax, Operand(eax)); | 858 __ test(eax, Operand(eax)); |
819 __ j(not_sign, &positive_left); | 859 __ j(not_sign, &positive_left); |
820 __ idiv(right_reg); | 860 __ idiv(right_reg); |
821 | 861 |
822 // Test the remainder for 0, because then the result would be -0. | 862 // Test the remainder for 0, because then the result would be -0. |
823 __ test(edx, Operand(edx)); | 863 __ test(edx, Operand(edx)); |
824 __ j(not_zero, &done); | 864 __ j(not_zero, &done); |
825 | 865 |
826 DeoptimizeIf(no_condition, instr->environment()); | 866 DeoptimizeIf(no_condition, instr->environment()); |
827 __ bind(&positive_left); | 867 __ bind(&positive_left); |
828 __ idiv(right_reg); | 868 __ idiv(right_reg); |
829 __ bind(&done); | 869 __ bind(&done); |
830 } else { | 870 } else { |
831 __ idiv(right_reg); | 871 __ idiv(right_reg); |
832 } | 872 } |
873 __ jmp(&done); | |
874 | |
875 __ bind(&remainder_eq_dividend); | |
876 __ mov(edx, eax); | |
877 | |
878 __ bind(&done); | |
833 } | 879 } |
834 } | 880 } |
835 | 881 |
836 | 882 |
837 void LCodeGen::DoDivI(LDivI* instr) { | 883 void LCodeGen::DoDivI(LDivI* instr) { |
838 LOperand* right = instr->InputAt(1); | 884 LOperand* right = instr->InputAt(1); |
839 ASSERT(ToRegister(instr->result()).is(eax)); | 885 ASSERT(ToRegister(instr->result()).is(eax)); |
840 ASSERT(ToRegister(instr->InputAt(0)).is(eax)); | 886 ASSERT(ToRegister(instr->InputAt(0)).is(eax)); |
841 ASSERT(!ToRegister(instr->InputAt(1)).is(eax)); | 887 ASSERT(!ToRegister(instr->InputAt(1)).is(eax)); |
842 ASSERT(!ToRegister(instr->InputAt(1)).is(edx)); | 888 ASSERT(!ToRegister(instr->InputAt(1)).is(edx)); |
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4163 ASSERT(osr_pc_offset_ == -1); | 4209 ASSERT(osr_pc_offset_ == -1); |
4164 osr_pc_offset_ = masm()->pc_offset(); | 4210 osr_pc_offset_ = masm()->pc_offset(); |
4165 } | 4211 } |
4166 | 4212 |
4167 | 4213 |
4168 #undef __ | 4214 #undef __ |
4169 | 4215 |
4170 } } // namespace v8::internal | 4216 } } // namespace v8::internal |
4171 | 4217 |
4172 #endif // V8_TARGET_ARCH_IA32 | 4218 #endif // V8_TARGET_ARCH_IA32 |
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