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Issue 6812046: X64: Convert HeapNumbers that contain valid smi values to smis in binop-stub. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Addressed review comments. Created 9 years, 8 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1313 and_(dst, constant_reg); 1313 and_(dst, constant_reg);
1314 } else { 1314 } else {
1315 LoadSmiConstant(dst, constant); 1315 LoadSmiConstant(dst, constant);
1316 and_(dst, src); 1316 and_(dst, src);
1317 } 1317 }
1318 } 1318 }
1319 1319
1320 1320
1321 void MacroAssembler::SmiOr(Register dst, Register src1, Register src2) { 1321 void MacroAssembler::SmiOr(Register dst, Register src1, Register src2) {
1322 if (!dst.is(src1)) { 1322 if (!dst.is(src1)) {
1323 ASSERT(!src1.is(src2));
1323 movq(dst, src1); 1324 movq(dst, src1);
1324 } 1325 }
1325 or_(dst, src2); 1326 or_(dst, src2);
1326 } 1327 }
1327 1328
1328 1329
1329 void MacroAssembler::SmiOrConstant(Register dst, Register src, Smi* constant) { 1330 void MacroAssembler::SmiOrConstant(Register dst, Register src, Smi* constant) {
1330 if (dst.is(src)) { 1331 if (dst.is(src)) {
1331 ASSERT(!dst.is(kScratchRegister)); 1332 ASSERT(!dst.is(kScratchRegister));
1332 Register constant_reg = GetSmiConstant(constant); 1333 Register constant_reg = GetSmiConstant(constant);
1333 or_(dst, constant_reg); 1334 or_(dst, constant_reg);
1334 } else { 1335 } else {
1335 LoadSmiConstant(dst, constant); 1336 LoadSmiConstant(dst, constant);
1336 or_(dst, src); 1337 or_(dst, src);
1337 } 1338 }
1338 } 1339 }
1339 1340
1340 1341
1341 void MacroAssembler::SmiXor(Register dst, Register src1, Register src2) { 1342 void MacroAssembler::SmiXor(Register dst, Register src1, Register src2) {
1342 if (!dst.is(src1)) { 1343 if (!dst.is(src1)) {
1344 ASSERT(!src1.is(src2));
1343 movq(dst, src1); 1345 movq(dst, src1);
1344 } 1346 }
1345 xor_(dst, src2); 1347 xor_(dst, src2);
1346 } 1348 }
1347 1349
1348 1350
1349 void MacroAssembler::SmiXorConstant(Register dst, Register src, Smi* constant) { 1351 void MacroAssembler::SmiXorConstant(Register dst, Register src, Smi* constant) {
1350 if (dst.is(src)) { 1352 if (dst.is(src)) {
1351 ASSERT(!dst.is(kScratchRegister)); 1353 ASSERT(!dst.is(kScratchRegister));
1352 Register constant_reg = GetSmiConstant(constant); 1354 Register constant_reg = GetSmiConstant(constant);
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2902 CPU::FlushICache(address_, size_); 2904 CPU::FlushICache(address_, size_);
2903 2905
2904 // Check that the code was patched as expected. 2906 // Check that the code was patched as expected.
2905 ASSERT(masm_.pc_ == address_ + size_); 2907 ASSERT(masm_.pc_ == address_ + size_);
2906 ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap); 2908 ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);
2907 } 2909 }
2908 2910
2909 } } // namespace v8::internal 2911 } } // namespace v8::internal
2910 2912
2911 #endif // V8_TARGET_ARCH_X64 2913 #endif // V8_TARGET_ARCH_X64
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