HACK: Pass data from firmware to kernel

lib/chromeos/os_storage.c

Index: lib/chromeos/os_storage.c
diff --git a/lib/chromeos/os_storage.c b/lib/chromeos/os_storage.c
index b3bec425d094e04d334ef548e669b1353e72659c..82dbcdd5cf2643ebbb855c88252519f16015db34 100644
--- a/lib/chromeos/os_storage.c
+++ b/lib/chromeos/os_storage.c
@@ -13,6 +13,12 @@
 #include <part.h>
 #include <chromeos/os_storage.h>
 
+/* TODO For load fmap; remove when not used */
+#include <chromeos/firmware_storage.h>
+
+/* TODO For strcpy; remove when not used */
+#include <linux/string.h>
+
 #include <boot_device.h>
 #include <load_kernel_fw.h>
 #include <vboot_nvstorage.h>
@@ -214,5 +220,83 @@ EXIT:
 				(int) params->bootloader_size);
 	}
 
+	/*
+	 * TODO(clchiou): This is an urgent hack for bringing up factory. We
+	 * fill in data that will be used by kernel at last 1MB space.
+	 *
+	 * Rewrite this part after the protocol specification between
+	 * Chrome OS firmware and kernel is finalized.
+	 */
+	if (status == LOAD_KERNEL_SUCCESS) {
+		DECLARE_GLOBAL_DATA_PTR;
+
+		void *kernel_shared_data = (void*)
+			gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS-1].start +
+			gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS-1].size - SZ_1M;
+
+		struct {
+			uint32_t	chsw;
+			uint8_t		hwid[256];
+			uint8_t		fwid[256];
+			uint8_t		frid[256];
+			uint32_t	binf[5];
+			uint32_t	gpio[11];
+			uint32_t	vbnv[2];
+			uint64_t	fmap_start_address;
+		} __attribute__((packed)) *sd = kernel_shared_data;
+
+		void *kernel_shared_data_body =
+			kernel_shared_data + sizeof(*sd);
+
+		debug(PREFIX "kernel shared data at %p\n", kernel_shared_data);
+
+		memset(sd, '\0', sizeof(*sd));
+
+		/*
+		 * chsw bit value
+		 *   bit 0x00000002 : recovery button pressed
+		 *   bit 0x00000020 : developer mode enabled
+		 *   bit 0x00000200 : firmware write protect disabled
+		 */
+		if (params->boot_flags & BOOT_FLAG_RECOVERY)
+			sd->chsw |= 0x002;
+		if (params->boot_flags & BOOT_FLAG_DEVELOPER)
+			sd->chsw |= 0x020;
+		sd->chsw |= 0x200; /* so far write protect is disabled */
+
+		strcpy((char*) sd->hwid, CONFIG_CHROMEOS_HWID);
+		strcpy((char*) sd->fwid, "ARM Firmware ID");
+		strcpy((char*) sd->frid, "ARM Read-Only Firmware ID");
+
+		sd->binf[0] = 0; /* boot reason; always 0 */
+		if (params->boot_flags & BOOT_FLAG_RECOVERY) {
+			sd->binf[1] = 0; /* active main firmware */
+			sd->binf[3] = 0; /* active firmware type */
+		} else {
+			sd->binf[1] = 1; /* active main firmware */
+			sd->binf[3] = 1; /* active firmware type */
+		}
+		sd->binf[2] = 0; /* active EC firmware */
+		VbNvGet(params->nv_context, VBNV_RECOVERY_REQUEST, sd->binf+4);
+
+		/* sd->gpio[i] == 1 if is active high */
+		sd->gpio[1] = 1; /* only developer mode gpio is active high */
+
+		sd->vbnv[0] = kernel_shared_data_body;
+		sd->vbnv[1] = VBNV_BLOCK_SIZE;
+		memcpy(kernel_shared_data_body, params->nv_context->raw,
+				VBNV_BLOCK_SIZE);
+		kernel_shared_data_body += VBNV_BLOCK_SIZE;
+
+		firmware_storage_t file;
+		firmware_storage_init(&file);
+		firmware_storage_read(&file,
+				CONFIG_OFFSET_FMAP, CONFIG_LENGTH_FMAP,
+				kernel_shared_data_body);
+		file.close(file.context);
+		sd->fmap_start_address = (uint64_t) kernel_shared_data_body;
+		kernel_shared_data_body += CONFIG_LENGTH_FMAP;
+	}
+
 	return status;
 }