Index: src/arm/disasm-arm.cc |
diff --git a/src/arm/disasm-arm.cc b/src/arm/disasm-arm.cc |
index 899b88a6d3399b2736b4aaeb17cb57ef17b292e7..a3775b5fca48ba257bcbb9aa1d66f2ca0cf6f117 100644 |
--- a/src/arm/disasm-arm.cc |
+++ b/src/arm/disasm-arm.cc |
@@ -1,4 +1,4 @@ |
-// Copyright 2010 the V8 project authors. All rights reserved. |
+// Copyright 2011 the V8 project authors. All rights reserved. |
// Redistribution and use in source and binary forms, with or without |
// modification, are permitted provided that the following conditions are |
// met: |
@@ -371,25 +371,34 @@ int Decoder::FormatRegister(Instruction* instr, const char* format) { |
int Decoder::FormatVFPRegister(Instruction* instr, const char* format) { |
ASSERT((format[0] == 'S') || (format[0] == 'D')); |
+ VFPRegPrecision precision = |
+ format[0] == 'D' ? kDoublePrecision : kSinglePrecision; |
+ |
+ int retval = 2; |
+ int reg = -1; |
if (format[1] == 'n') { |
- int reg = instr->VnValue(); |
- if (format[0] == 'S') PrintSRegister(((reg << 1) | instr->NValue())); |
- if (format[0] == 'D') PrintDRegister(reg); |
- return 2; |
+ reg = instr->VFPNRegValue(precision); |
} else if (format[1] == 'm') { |
- int reg = instr->VmValue(); |
- if (format[0] == 'S') PrintSRegister(((reg << 1) | instr->MValue())); |
- if (format[0] == 'D') PrintDRegister(reg); |
- return 2; |
+ reg = instr->VFPMRegValue(precision); |
} else if (format[1] == 'd') { |
- int reg = instr->VdValue(); |
- if (format[0] == 'S') PrintSRegister(((reg << 1) | instr->DValue())); |
- if (format[0] == 'D') PrintDRegister(reg); |
- return 2; |
+ reg = instr->VFPDRegValue(precision); |
+ if (format[2] == '+') { |
+ int immed8 = instr->Immed8Value(); |
+ if (format[0] == 'S') reg += immed8 - 1; |
+ if (format[0] == 'D') reg += (immed8 / 2 - 1); |
+ } |
+ if (format[2] == '+') retval = 3; |
+ } else { |
+ UNREACHABLE(); |
} |
- UNREACHABLE(); |
- return -1; |
+ if (precision == kSinglePrecision) { |
+ PrintSRegister(reg); |
+ } else { |
+ PrintDRegister(reg); |
+ } |
+ |
+ return retval; |
} |
@@ -1273,9 +1282,22 @@ void Decoder::DecodeType6CoprocessorIns(Instruction* instr) { |
Format(instr, "vstr'cond 'Sd, ['rn + 4*'imm08@00]"); |
} |
break; |
+ case 0x4: |
+ case 0x5: |
+ case 0x6: |
+ case 0x7: |
+ case 0x9: |
+ case 0xB: { |
+ bool to_vfp_register = (instr->VLValue() == 0x1); |
+ if (to_vfp_register) { |
+ Format(instr, "vldm'cond'pu 'rn'w, {'Sd-'Sd+}"); |
+ } else { |
+ Format(instr, "vstm'cond'pu 'rn'w, {'Sd-'Sd+}"); |
+ } |
+ break; |
+ } |
default: |
Unknown(instr); // Not used by V8. |
- break; |
} |
} else if (instr->CoprocessorValue() == 0xB) { |
switch (instr->OpcodeValue()) { |
@@ -1303,9 +1325,19 @@ void Decoder::DecodeType6CoprocessorIns(Instruction* instr) { |
Format(instr, "vstr'cond 'Dd, ['rn + 4*'imm08@00]"); |
} |
break; |
+ case 0x4: |
+ case 0x5: |
+ case 0x9: { |
+ bool to_vfp_register = (instr->VLValue() == 0x1); |
+ if (to_vfp_register) { |
+ Format(instr, "vldm'cond'pu 'rn'w, {'Dd-'Dd+}"); |
+ } else { |
+ Format(instr, "vstm'cond'pu 'rn'w, {'Dd-'Dd+}"); |
+ } |
+ break; |
+ } |
default: |
Unknown(instr); // Not used by V8. |
- break; |
} |
} else { |
Unknown(instr); // Not used by V8. |