| Index: src/x64/assembler-x64.cc
|
| diff --git a/src/x64/assembler-x64.cc b/src/x64/assembler-x64.cc
|
| index efaf0d23ac60eb23a4b4ee61d0b23c741ea88b1e..4f61b9bd2dbfca9efd686b6e36b32f062962d04c 100644
|
| --- a/src/x64/assembler-x64.cc
|
| +++ b/src/x64/assembler-x64.cc
|
| @@ -388,6 +388,7 @@ Assembler::Assembler(Isolate* arg_isolate, void* buffer, int buffer_size)
|
| pc_ = buffer_;
|
| reloc_info_writer.Reposition(buffer_ + buffer_size, pc_);
|
|
|
| + last_pc_ = NULL;
|
|
|
| #ifdef GENERATED_CODE_COVERAGE
|
| InitCoverageLog();
|
| @@ -443,6 +444,7 @@ void Assembler::CodeTargetAlign() {
|
|
|
| void Assembler::bind_to(Label* L, int pos) {
|
| ASSERT(!L->is_bound()); // Label may only be bound once.
|
| + last_pc_ = NULL;
|
| ASSERT(0 <= pos && pos <= pc_offset()); // Position must be valid.
|
| if (L->is_linked()) {
|
| int current = L->pos();
|
| @@ -469,6 +471,7 @@ void Assembler::bind(Label* L) {
|
|
|
| void Assembler::bind(NearLabel* L) {
|
| ASSERT(!L->is_bound());
|
| + last_pc_ = NULL;
|
| while (L->unresolved_branches_ > 0) {
|
| int branch_pos = L->unresolved_positions_[L->unresolved_branches_ - 1];
|
| int disp = pc_offset() - branch_pos;
|
| @@ -529,6 +532,9 @@ void Assembler::GrowBuffer() {
|
| buffer_ = desc.buffer;
|
| buffer_size_ = desc.buffer_size;
|
| pc_ += pc_delta;
|
| + if (last_pc_ != NULL) {
|
| + last_pc_ += pc_delta;
|
| + }
|
| reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta,
|
| reloc_info_writer.last_pc() + pc_delta);
|
|
|
| @@ -566,6 +572,7 @@ void Assembler::emit_operand(int code, const Operand& adr) {
|
|
|
| void Assembler::arithmetic_op(byte opcode, Register reg, const Operand& op) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(reg, op);
|
| emit(opcode);
|
| emit_operand(reg, op);
|
| @@ -574,6 +581,7 @@ void Assembler::arithmetic_op(byte opcode, Register reg, const Operand& op) {
|
|
|
| void Assembler::arithmetic_op(byte opcode, Register reg, Register rm_reg) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| ASSERT((opcode & 0xC6) == 2);
|
| if (rm_reg.low_bits() == 4) { // Forces SIB byte.
|
| // Swap reg and rm_reg and change opcode operand order.
|
| @@ -590,6 +598,7 @@ void Assembler::arithmetic_op(byte opcode, Register reg, Register rm_reg) {
|
|
|
| void Assembler::arithmetic_op_16(byte opcode, Register reg, Register rm_reg) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| ASSERT((opcode & 0xC6) == 2);
|
| if (rm_reg.low_bits() == 4) { // Forces SIB byte.
|
| // Swap reg and rm_reg and change opcode operand order.
|
| @@ -610,6 +619,7 @@ void Assembler::arithmetic_op_16(byte opcode,
|
| Register reg,
|
| const Operand& rm_reg) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_optional_rex_32(reg, rm_reg);
|
| emit(opcode);
|
| @@ -619,6 +629,7 @@ void Assembler::arithmetic_op_16(byte opcode,
|
|
|
| void Assembler::arithmetic_op_32(byte opcode, Register reg, Register rm_reg) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| ASSERT((opcode & 0xC6) == 2);
|
| if (rm_reg.low_bits() == 4) { // Forces SIB byte.
|
| // Swap reg and rm_reg and change opcode operand order.
|
| @@ -637,6 +648,7 @@ void Assembler::arithmetic_op_32(byte opcode,
|
| Register reg,
|
| const Operand& rm_reg) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(reg, rm_reg);
|
| emit(opcode);
|
| emit_operand(reg, rm_reg);
|
| @@ -647,6 +659,7 @@ void Assembler::immediate_arithmetic_op(byte subcode,
|
| Register dst,
|
| Immediate src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| if (is_int8(src.value_)) {
|
| emit(0x83);
|
| @@ -666,6 +679,7 @@ void Assembler::immediate_arithmetic_op(byte subcode,
|
| const Operand& dst,
|
| Immediate src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| if (is_int8(src.value_)) {
|
| emit(0x83);
|
| @@ -683,6 +697,7 @@ void Assembler::immediate_arithmetic_op_16(byte subcode,
|
| Register dst,
|
| Immediate src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66); // Operand size override prefix.
|
| emit_optional_rex_32(dst);
|
| if (is_int8(src.value_)) {
|
| @@ -704,6 +719,7 @@ void Assembler::immediate_arithmetic_op_16(byte subcode,
|
| const Operand& dst,
|
| Immediate src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66); // Operand size override prefix.
|
| emit_optional_rex_32(dst);
|
| if (is_int8(src.value_)) {
|
| @@ -722,6 +738,7 @@ void Assembler::immediate_arithmetic_op_32(byte subcode,
|
| Register dst,
|
| Immediate src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| if (is_int8(src.value_)) {
|
| emit(0x83);
|
| @@ -742,6 +759,7 @@ void Assembler::immediate_arithmetic_op_32(byte subcode,
|
| const Operand& dst,
|
| Immediate src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| if (is_int8(src.value_)) {
|
| emit(0x83);
|
| @@ -759,6 +777,7 @@ void Assembler::immediate_arithmetic_op_8(byte subcode,
|
| const Operand& dst,
|
| Immediate src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| ASSERT(is_int8(src.value_) || is_uint8(src.value_));
|
| emit(0x80);
|
| @@ -771,6 +790,7 @@ void Assembler::immediate_arithmetic_op_8(byte subcode,
|
| Register dst,
|
| Immediate src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (dst.code() > 3) {
|
| // Use 64-bit mode byte registers.
|
| emit_rex_64(dst);
|
| @@ -784,6 +804,7 @@ void Assembler::immediate_arithmetic_op_8(byte subcode,
|
|
|
| void Assembler::shift(Register dst, Immediate shift_amount, int subcode) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| ASSERT(is_uint6(shift_amount.value_)); // illegal shift count
|
| if (shift_amount.value_ == 1) {
|
| emit_rex_64(dst);
|
| @@ -800,6 +821,7 @@ void Assembler::shift(Register dst, Immediate shift_amount, int subcode) {
|
|
|
| void Assembler::shift(Register dst, int subcode) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xD3);
|
| emit_modrm(subcode, dst);
|
| @@ -808,6 +830,7 @@ void Assembler::shift(Register dst, int subcode) {
|
|
|
| void Assembler::shift_32(Register dst, int subcode) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0xD3);
|
| emit_modrm(subcode, dst);
|
| @@ -816,6 +839,7 @@ void Assembler::shift_32(Register dst, int subcode) {
|
|
|
| void Assembler::shift_32(Register dst, Immediate shift_amount, int subcode) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| ASSERT(is_uint5(shift_amount.value_)); // illegal shift count
|
| if (shift_amount.value_ == 1) {
|
| emit_optional_rex_32(dst);
|
| @@ -832,6 +856,7 @@ void Assembler::shift_32(Register dst, Immediate shift_amount, int subcode) {
|
|
|
| void Assembler::bt(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(src, dst);
|
| emit(0x0F);
|
| emit(0xA3);
|
| @@ -841,6 +866,7 @@ void Assembler::bt(const Operand& dst, Register src) {
|
|
|
| void Assembler::bts(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(src, dst);
|
| emit(0x0F);
|
| emit(0xAB);
|
| @@ -851,6 +877,7 @@ void Assembler::bts(const Operand& dst, Register src) {
|
| void Assembler::call(Label* L) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| // 1110 1000 #32-bit disp.
|
| emit(0xE8);
|
| if (L->is_bound()) {
|
| @@ -872,6 +899,7 @@ void Assembler::call(Label* L) {
|
| void Assembler::call(Handle<Code> target, RelocInfo::Mode rmode) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| // 1110 1000 #32-bit disp.
|
| emit(0xE8);
|
| emit_code_target(target, rmode);
|
| @@ -881,6 +909,7 @@ void Assembler::call(Handle<Code> target, RelocInfo::Mode rmode) {
|
| void Assembler::call(Register adr) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| // Opcode: FF /2 r64.
|
| emit_optional_rex_32(adr);
|
| emit(0xFF);
|
| @@ -891,6 +920,7 @@ void Assembler::call(Register adr) {
|
| void Assembler::call(const Operand& op) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| // Opcode: FF /2 m64.
|
| emit_optional_rex_32(op);
|
| emit(0xFF);
|
| @@ -905,6 +935,7 @@ void Assembler::call(const Operand& op) {
|
| void Assembler::call(Address target) {
|
| positions_recorder()->WriteRecordedPositions();
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| // 1110 1000 #32-bit disp.
|
| emit(0xE8);
|
| Address source = pc_ + 4;
|
| @@ -916,16 +947,19 @@ void Assembler::call(Address target) {
|
|
|
| void Assembler::clc() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF8);
|
| }
|
|
|
| void Assembler::cld() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xFC);
|
| }
|
|
|
| void Assembler::cdq() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x99);
|
| }
|
|
|
| @@ -940,6 +974,7 @@ void Assembler::cmovq(Condition cc, Register dst, Register src) {
|
| // 64-bit architecture.
|
| ASSERT(cc >= 0); // Use mov for unconditional moves.
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| // Opcode: REX.W 0f 40 + cc /r.
|
| emit_rex_64(dst, src);
|
| emit(0x0f);
|
| @@ -956,6 +991,7 @@ void Assembler::cmovq(Condition cc, Register dst, const Operand& src) {
|
| }
|
| ASSERT(cc >= 0);
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| // Opcode: REX.W 0f 40 + cc /r.
|
| emit_rex_64(dst, src);
|
| emit(0x0f);
|
| @@ -972,6 +1008,7 @@ void Assembler::cmovl(Condition cc, Register dst, Register src) {
|
| }
|
| ASSERT(cc >= 0);
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| // Opcode: 0f 40 + cc /r.
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0f);
|
| @@ -988,6 +1025,7 @@ void Assembler::cmovl(Condition cc, Register dst, const Operand& src) {
|
| }
|
| ASSERT(cc >= 0);
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| // Opcode: 0f 40 + cc /r.
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0f);
|
| @@ -999,6 +1037,7 @@ void Assembler::cmovl(Condition cc, Register dst, const Operand& src) {
|
| void Assembler::cmpb_al(Immediate imm8) {
|
| ASSERT(is_int8(imm8.value_) || is_uint8(imm8.value_));
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x3c);
|
| emit(imm8.value_);
|
| }
|
| @@ -1007,6 +1046,7 @@ void Assembler::cmpb_al(Immediate imm8) {
|
| void Assembler::cpuid() {
|
| ASSERT(CpuFeatures::IsEnabled(CPUID));
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x0F);
|
| emit(0xA2);
|
| }
|
| @@ -1014,6 +1054,7 @@ void Assembler::cpuid() {
|
|
|
| void Assembler::cqo() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64();
|
| emit(0x99);
|
| }
|
| @@ -1021,6 +1062,7 @@ void Assembler::cqo() {
|
|
|
| void Assembler::decq(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xFF);
|
| emit_modrm(0x1, dst);
|
| @@ -1029,6 +1071,7 @@ void Assembler::decq(Register dst) {
|
|
|
| void Assembler::decq(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xFF);
|
| emit_operand(1, dst);
|
| @@ -1037,6 +1080,7 @@ void Assembler::decq(const Operand& dst) {
|
|
|
| void Assembler::decl(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0xFF);
|
| emit_modrm(0x1, dst);
|
| @@ -1045,6 +1089,7 @@ void Assembler::decl(Register dst) {
|
|
|
| void Assembler::decl(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0xFF);
|
| emit_operand(1, dst);
|
| @@ -1053,6 +1098,7 @@ void Assembler::decl(const Operand& dst) {
|
|
|
| void Assembler::decb(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (dst.code() > 3) {
|
| // Register is not one of al, bl, cl, dl. Its encoding needs REX.
|
| emit_rex_32(dst);
|
| @@ -1064,6 +1110,7 @@ void Assembler::decb(Register dst) {
|
|
|
| void Assembler::decb(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0xFE);
|
| emit_operand(1, dst);
|
| @@ -1072,6 +1119,7 @@ void Assembler::decb(const Operand& dst) {
|
|
|
| void Assembler::enter(Immediate size) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xC8);
|
| emitw(size.value_); // 16 bit operand, always.
|
| emit(0);
|
| @@ -1080,12 +1128,14 @@ void Assembler::enter(Immediate size) {
|
|
|
| void Assembler::hlt() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF4);
|
| }
|
|
|
|
|
| void Assembler::idivq(Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(src);
|
| emit(0xF7);
|
| emit_modrm(0x7, src);
|
| @@ -1094,6 +1144,7 @@ void Assembler::idivq(Register src) {
|
|
|
| void Assembler::idivl(Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(src);
|
| emit(0xF7);
|
| emit_modrm(0x7, src);
|
| @@ -1102,6 +1153,7 @@ void Assembler::idivl(Register src) {
|
|
|
| void Assembler::imul(Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(src);
|
| emit(0xF7);
|
| emit_modrm(0x5, src);
|
| @@ -1110,6 +1162,7 @@ void Assembler::imul(Register src) {
|
|
|
| void Assembler::imul(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst, src);
|
| emit(0x0F);
|
| emit(0xAF);
|
| @@ -1119,6 +1172,7 @@ void Assembler::imul(Register dst, Register src) {
|
|
|
| void Assembler::imul(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst, src);
|
| emit(0x0F);
|
| emit(0xAF);
|
| @@ -1128,6 +1182,7 @@ void Assembler::imul(Register dst, const Operand& src) {
|
|
|
| void Assembler::imul(Register dst, Register src, Immediate imm) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst, src);
|
| if (is_int8(imm.value_)) {
|
| emit(0x6B);
|
| @@ -1143,6 +1198,7 @@ void Assembler::imul(Register dst, Register src, Immediate imm) {
|
|
|
| void Assembler::imull(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| emit(0xAF);
|
| @@ -1152,6 +1208,7 @@ void Assembler::imull(Register dst, Register src) {
|
|
|
| void Assembler::imull(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| emit(0xAF);
|
| @@ -1161,6 +1218,7 @@ void Assembler::imull(Register dst, const Operand& src) {
|
|
|
| void Assembler::imull(Register dst, Register src, Immediate imm) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst, src);
|
| if (is_int8(imm.value_)) {
|
| emit(0x6B);
|
| @@ -1176,6 +1234,7 @@ void Assembler::imull(Register dst, Register src, Immediate imm) {
|
|
|
| void Assembler::incq(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xFF);
|
| emit_modrm(0x0, dst);
|
| @@ -1184,6 +1243,7 @@ void Assembler::incq(Register dst) {
|
|
|
| void Assembler::incq(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xFF);
|
| emit_operand(0, dst);
|
| @@ -1192,6 +1252,7 @@ void Assembler::incq(const Operand& dst) {
|
|
|
| void Assembler::incl(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0xFF);
|
| emit_operand(0, dst);
|
| @@ -1200,6 +1261,7 @@ void Assembler::incl(const Operand& dst) {
|
|
|
| void Assembler::incl(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0xFF);
|
| emit_modrm(0, dst);
|
| @@ -1208,6 +1270,7 @@ void Assembler::incl(Register dst) {
|
|
|
| void Assembler::int3() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xCC);
|
| }
|
|
|
| @@ -1220,6 +1283,7 @@ void Assembler::j(Condition cc, Label* L) {
|
| return;
|
| }
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| ASSERT(is_uint4(cc));
|
| if (L->is_bound()) {
|
| const int short_size = 2;
|
| @@ -1257,6 +1321,7 @@ void Assembler::j(Condition cc,
|
| Handle<Code> target,
|
| RelocInfo::Mode rmode) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| ASSERT(is_uint4(cc));
|
| // 0000 1111 1000 tttn #32-bit disp.
|
| emit(0x0F);
|
| @@ -1267,6 +1332,7 @@ void Assembler::j(Condition cc,
|
|
|
| void Assembler::j(Condition cc, NearLabel* L, Hint hint) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| ASSERT(0 <= cc && cc < 16);
|
| if (FLAG_emit_branch_hints && hint != no_hint) emit(hint);
|
| if (L->is_bound()) {
|
| @@ -1287,6 +1353,7 @@ void Assembler::j(Condition cc, NearLabel* L, Hint hint) {
|
|
|
| void Assembler::jmp(Label* L) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| const int short_size = sizeof(int8_t);
|
| const int long_size = sizeof(int32_t);
|
| if (L->is_bound()) {
|
| @@ -1319,6 +1386,7 @@ void Assembler::jmp(Label* L) {
|
|
|
| void Assembler::jmp(Handle<Code> target, RelocInfo::Mode rmode) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| // 1110 1001 #32-bit disp.
|
| emit(0xE9);
|
| emit_code_target(target, rmode);
|
| @@ -1327,6 +1395,7 @@ void Assembler::jmp(Handle<Code> target, RelocInfo::Mode rmode) {
|
|
|
| void Assembler::jmp(NearLabel* L) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (L->is_bound()) {
|
| const int short_size = sizeof(int8_t);
|
| int offs = L->pos() - pc_offset();
|
| @@ -1345,6 +1414,7 @@ void Assembler::jmp(NearLabel* L) {
|
|
|
| void Assembler::jmp(Register target) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| // Opcode FF/4 r64.
|
| emit_optional_rex_32(target);
|
| emit(0xFF);
|
| @@ -1354,6 +1424,7 @@ void Assembler::jmp(Register target) {
|
|
|
| void Assembler::jmp(const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| // Opcode FF/4 m64.
|
| emit_optional_rex_32(src);
|
| emit(0xFF);
|
| @@ -1363,6 +1434,7 @@ void Assembler::jmp(const Operand& src) {
|
|
|
| void Assembler::lea(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst, src);
|
| emit(0x8D);
|
| emit_operand(dst, src);
|
| @@ -1371,6 +1443,7 @@ void Assembler::lea(Register dst, const Operand& src) {
|
|
|
| void Assembler::leal(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst, src);
|
| emit(0x8D);
|
| emit_operand(dst, src);
|
| @@ -1379,6 +1452,7 @@ void Assembler::leal(Register dst, const Operand& src) {
|
|
|
| void Assembler::load_rax(void* value, RelocInfo::Mode mode) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x48); // REX.W
|
| emit(0xA1);
|
| emitq(reinterpret_cast<uintptr_t>(value), mode);
|
| @@ -1392,12 +1466,14 @@ void Assembler::load_rax(ExternalReference ref) {
|
|
|
| void Assembler::leave() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xC9);
|
| }
|
|
|
|
|
| void Assembler::movb(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_32(dst, src);
|
| emit(0x8A);
|
| emit_operand(dst, src);
|
| @@ -1406,6 +1482,7 @@ void Assembler::movb(Register dst, const Operand& src) {
|
|
|
| void Assembler::movb(Register dst, Immediate imm) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_32(dst);
|
| emit(0xC6);
|
| emit_modrm(0x0, dst);
|
| @@ -1415,6 +1492,7 @@ void Assembler::movb(Register dst, Immediate imm) {
|
|
|
| void Assembler::movb(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_32(src, dst);
|
| emit(0x88);
|
| emit_operand(src, dst);
|
| @@ -1423,6 +1501,7 @@ void Assembler::movb(const Operand& dst, Register src) {
|
|
|
| void Assembler::movw(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_optional_rex_32(src, dst);
|
| emit(0x89);
|
| @@ -1432,6 +1511,7 @@ void Assembler::movw(const Operand& dst, Register src) {
|
|
|
| void Assembler::movl(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst, src);
|
| emit(0x8B);
|
| emit_operand(dst, src);
|
| @@ -1440,6 +1520,7 @@ void Assembler::movl(Register dst, const Operand& src) {
|
|
|
| void Assembler::movl(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (src.low_bits() == 4) {
|
| emit_optional_rex_32(src, dst);
|
| emit(0x89);
|
| @@ -1454,6 +1535,7 @@ void Assembler::movl(Register dst, Register src) {
|
|
|
| void Assembler::movl(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(src, dst);
|
| emit(0x89);
|
| emit_operand(src, dst);
|
| @@ -1462,6 +1544,7 @@ void Assembler::movl(const Operand& dst, Register src) {
|
|
|
| void Assembler::movl(const Operand& dst, Immediate value) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0xC7);
|
| emit_operand(0x0, dst);
|
| @@ -1471,6 +1554,7 @@ void Assembler::movl(const Operand& dst, Immediate value) {
|
|
|
| void Assembler::movl(Register dst, Immediate value) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0xC7);
|
| emit_modrm(0x0, dst);
|
| @@ -1480,6 +1564,7 @@ void Assembler::movl(Register dst, Immediate value) {
|
|
|
| void Assembler::movq(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst, src);
|
| emit(0x8B);
|
| emit_operand(dst, src);
|
| @@ -1488,6 +1573,7 @@ void Assembler::movq(Register dst, const Operand& src) {
|
|
|
| void Assembler::movq(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (src.low_bits() == 4) {
|
| emit_rex_64(src, dst);
|
| emit(0x89);
|
| @@ -1502,6 +1588,7 @@ void Assembler::movq(Register dst, Register src) {
|
|
|
| void Assembler::movq(Register dst, Immediate value) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xC7);
|
| emit_modrm(0x0, dst);
|
| @@ -1511,6 +1598,7 @@ void Assembler::movq(Register dst, Immediate value) {
|
|
|
| void Assembler::movq(const Operand& dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(src, dst);
|
| emit(0x89);
|
| emit_operand(src, dst);
|
| @@ -1522,6 +1610,7 @@ void Assembler::movq(Register dst, void* value, RelocInfo::Mode rmode) {
|
| // address is not GC safe. Use the handle version instead.
|
| ASSERT(rmode > RelocInfo::LAST_GCED_ENUM);
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xB8 | dst.low_bits());
|
| emitq(reinterpret_cast<uintptr_t>(value), rmode);
|
| @@ -1543,6 +1632,7 @@ void Assembler::movq(Register dst, int64_t value, RelocInfo::Mode rmode) {
|
| // value.
|
| }
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xB8 | dst.low_bits());
|
| emitq(value, rmode);
|
| @@ -1557,6 +1647,7 @@ void Assembler::movq(Register dst, ExternalReference ref) {
|
|
|
| void Assembler::movq(const Operand& dst, Immediate value) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xC7);
|
| emit_operand(0, dst);
|
| @@ -1568,6 +1659,7 @@ void Assembler::movq(const Operand& dst, Immediate value) {
|
| // (as a 32-bit offset sign extended to 64-bit).
|
| void Assembler::movl(const Operand& dst, Label* src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0xC7);
|
| emit_operand(0, dst);
|
| @@ -1597,6 +1689,7 @@ void Assembler::movq(Register dst, Handle<Object> value, RelocInfo::Mode mode) {
|
| movq(dst, reinterpret_cast<int64_t>(*value), RelocInfo::NONE);
|
| } else {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| ASSERT(value->IsHeapObject());
|
| ASSERT(!HEAP->InNewSpace(*value));
|
| emit_rex_64(dst);
|
| @@ -1608,6 +1701,7 @@ void Assembler::movq(Register dst, Handle<Object> value, RelocInfo::Mode mode) {
|
|
|
| void Assembler::movsxbq(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst, src);
|
| emit(0x0F);
|
| emit(0xBE);
|
| @@ -1617,6 +1711,7 @@ void Assembler::movsxbq(Register dst, const Operand& src) {
|
|
|
| void Assembler::movsxwq(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst, src);
|
| emit(0x0F);
|
| emit(0xBF);
|
| @@ -1626,6 +1721,7 @@ void Assembler::movsxwq(Register dst, const Operand& src) {
|
|
|
| void Assembler::movsxlq(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst, src);
|
| emit(0x63);
|
| emit_modrm(dst, src);
|
| @@ -1634,6 +1730,7 @@ void Assembler::movsxlq(Register dst, Register src) {
|
|
|
| void Assembler::movsxlq(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst, src);
|
| emit(0x63);
|
| emit_operand(dst, src);
|
| @@ -1642,6 +1739,7 @@ void Assembler::movsxlq(Register dst, const Operand& src) {
|
|
|
| void Assembler::movzxbq(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| emit(0xB6);
|
| @@ -1651,6 +1749,7 @@ void Assembler::movzxbq(Register dst, const Operand& src) {
|
|
|
| void Assembler::movzxbl(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| emit(0xB6);
|
| @@ -1660,6 +1759,7 @@ void Assembler::movzxbl(Register dst, const Operand& src) {
|
|
|
| void Assembler::movzxwq(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| emit(0xB7);
|
| @@ -1669,6 +1769,7 @@ void Assembler::movzxwq(Register dst, const Operand& src) {
|
|
|
| void Assembler::movzxwl(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| emit(0xB7);
|
| @@ -1678,6 +1779,7 @@ void Assembler::movzxwl(Register dst, const Operand& src) {
|
|
|
| void Assembler::repmovsb() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF3);
|
| emit(0xA4);
|
| }
|
| @@ -1685,6 +1787,7 @@ void Assembler::repmovsb() {
|
|
|
| void Assembler::repmovsw() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66); // Operand size override.
|
| emit(0xF3);
|
| emit(0xA4);
|
| @@ -1693,6 +1796,7 @@ void Assembler::repmovsw() {
|
|
|
| void Assembler::repmovsl() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF3);
|
| emit(0xA5);
|
| }
|
| @@ -1700,6 +1804,7 @@ void Assembler::repmovsl() {
|
|
|
| void Assembler::repmovsq() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF3);
|
| emit_rex_64();
|
| emit(0xA5);
|
| @@ -1708,6 +1813,7 @@ void Assembler::repmovsq() {
|
|
|
| void Assembler::mul(Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(src);
|
| emit(0xF7);
|
| emit_modrm(0x4, src);
|
| @@ -1716,6 +1822,7 @@ void Assembler::mul(Register src) {
|
|
|
| void Assembler::neg(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xF7);
|
| emit_modrm(0x3, dst);
|
| @@ -1724,6 +1831,7 @@ void Assembler::neg(Register dst) {
|
|
|
| void Assembler::negl(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0xF7);
|
| emit_modrm(0x3, dst);
|
| @@ -1732,6 +1840,7 @@ void Assembler::negl(Register dst) {
|
|
|
| void Assembler::neg(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xF7);
|
| emit_operand(3, dst);
|
| @@ -1740,12 +1849,14 @@ void Assembler::neg(const Operand& dst) {
|
|
|
| void Assembler::nop() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x90);
|
| }
|
|
|
|
|
| void Assembler::not_(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xF7);
|
| emit_modrm(0x2, dst);
|
| @@ -1754,6 +1865,7 @@ void Assembler::not_(Register dst) {
|
|
|
| void Assembler::not_(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(dst);
|
| emit(0xF7);
|
| emit_operand(2, dst);
|
| @@ -1762,6 +1874,7 @@ void Assembler::not_(const Operand& dst) {
|
|
|
| void Assembler::notl(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0xF7);
|
| emit_modrm(0x2, dst);
|
| @@ -1786,6 +1899,7 @@ void Assembler::nop(int n) {
|
| ASSERT(1 <= n);
|
| ASSERT(n <= 9);
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| switch (n) {
|
| case 1:
|
| emit(0x90);
|
| @@ -1856,6 +1970,7 @@ void Assembler::nop(int n) {
|
|
|
| void Assembler::pop(Register dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0x58 | dst.low_bits());
|
| }
|
| @@ -1863,6 +1978,7 @@ void Assembler::pop(Register dst) {
|
|
|
| void Assembler::pop(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(dst);
|
| emit(0x8F);
|
| emit_operand(0, dst);
|
| @@ -1871,12 +1987,14 @@ void Assembler::pop(const Operand& dst) {
|
|
|
| void Assembler::popfq() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x9D);
|
| }
|
|
|
|
|
| void Assembler::push(Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(src);
|
| emit(0x50 | src.low_bits());
|
| }
|
| @@ -1884,6 +2002,7 @@ void Assembler::push(Register src) {
|
|
|
| void Assembler::push(const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(src);
|
| emit(0xFF);
|
| emit_operand(6, src);
|
| @@ -1892,6 +2011,7 @@ void Assembler::push(const Operand& src) {
|
|
|
| void Assembler::push(Immediate value) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (is_int8(value.value_)) {
|
| emit(0x6A);
|
| emit(value.value_); // Emit low byte of value.
|
| @@ -1904,6 +2024,7 @@ void Assembler::push(Immediate value) {
|
|
|
| void Assembler::push_imm32(int32_t imm32) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x68);
|
| emitl(imm32);
|
| }
|
| @@ -1911,12 +2032,14 @@ void Assembler::push_imm32(int32_t imm32) {
|
|
|
| void Assembler::pushfq() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x9C);
|
| }
|
|
|
|
|
| void Assembler::rdtsc() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x0F);
|
| emit(0x31);
|
| }
|
| @@ -1924,6 +2047,7 @@ void Assembler::rdtsc() {
|
|
|
| void Assembler::ret(int imm16) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| ASSERT(is_uint16(imm16));
|
| if (imm16 == 0) {
|
| emit(0xC3);
|
| @@ -1941,6 +2065,7 @@ void Assembler::setcc(Condition cc, Register reg) {
|
| return;
|
| }
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| ASSERT(is_uint4(cc));
|
| if (reg.code() > 3) { // Use x64 byte registers, where different.
|
| emit_rex_32(reg);
|
| @@ -1953,6 +2078,7 @@ void Assembler::setcc(Condition cc, Register reg) {
|
|
|
| void Assembler::shld(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(src, dst);
|
| emit(0x0F);
|
| emit(0xA5);
|
| @@ -1962,6 +2088,7 @@ void Assembler::shld(Register dst, Register src) {
|
|
|
| void Assembler::shrd(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(src, dst);
|
| emit(0x0F);
|
| emit(0xAD);
|
| @@ -1971,6 +2098,7 @@ void Assembler::shrd(Register dst, Register src) {
|
|
|
| void Assembler::xchg(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (src.is(rax) || dst.is(rax)) { // Single-byte encoding
|
| Register other = src.is(rax) ? dst : src;
|
| emit_rex_64(other);
|
| @@ -1989,6 +2117,7 @@ void Assembler::xchg(Register dst, Register src) {
|
|
|
| void Assembler::store_rax(void* dst, RelocInfo::Mode mode) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x48); // REX.W
|
| emit(0xA3);
|
| emitq(reinterpret_cast<uintptr_t>(dst), mode);
|
| @@ -2002,6 +2131,7 @@ void Assembler::store_rax(ExternalReference ref) {
|
|
|
| void Assembler::testb(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (src.low_bits() == 4) {
|
| emit_rex_32(src, dst);
|
| emit(0x84);
|
| @@ -2020,6 +2150,7 @@ void Assembler::testb(Register dst, Register src) {
|
| void Assembler::testb(Register reg, Immediate mask) {
|
| ASSERT(is_int8(mask.value_) || is_uint8(mask.value_));
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (reg.is(rax)) {
|
| emit(0xA8);
|
| emit(mask.value_); // Low byte emitted.
|
| @@ -2038,6 +2169,7 @@ void Assembler::testb(Register reg, Immediate mask) {
|
| void Assembler::testb(const Operand& op, Immediate mask) {
|
| ASSERT(is_int8(mask.value_) || is_uint8(mask.value_));
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(rax, op);
|
| emit(0xF6);
|
| emit_operand(rax, op); // Operation code 0
|
| @@ -2047,6 +2179,7 @@ void Assembler::testb(const Operand& op, Immediate mask) {
|
|
|
| void Assembler::testb(const Operand& op, Register reg) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (reg.code() > 3) {
|
| // Register is not one of al, bl, cl, dl. Its encoding needs REX.
|
| emit_rex_32(reg, op);
|
| @@ -2060,6 +2193,7 @@ void Assembler::testb(const Operand& op, Register reg) {
|
|
|
| void Assembler::testl(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (src.low_bits() == 4) {
|
| emit_optional_rex_32(src, dst);
|
| emit(0x85);
|
| @@ -2079,6 +2213,7 @@ void Assembler::testl(Register reg, Immediate mask) {
|
| return;
|
| }
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (reg.is(rax)) {
|
| emit(0xA9);
|
| emit(mask);
|
| @@ -2098,6 +2233,7 @@ void Assembler::testl(const Operand& op, Immediate mask) {
|
| return;
|
| }
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(rax, op);
|
| emit(0xF7);
|
| emit_operand(rax, op); // Operation code 0
|
| @@ -2107,6 +2243,7 @@ void Assembler::testl(const Operand& op, Immediate mask) {
|
|
|
| void Assembler::testq(const Operand& op, Register reg) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_rex_64(reg, op);
|
| emit(0x85);
|
| emit_operand(reg, op);
|
| @@ -2115,6 +2252,7 @@ void Assembler::testq(const Operand& op, Register reg) {
|
|
|
| void Assembler::testq(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (src.low_bits() == 4) {
|
| emit_rex_64(src, dst);
|
| emit(0x85);
|
| @@ -2129,6 +2267,7 @@ void Assembler::testq(Register dst, Register src) {
|
|
|
| void Assembler::testq(Register dst, Immediate mask) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| if (dst.is(rax)) {
|
| emit_rex_64();
|
| emit(0xA9);
|
| @@ -2147,12 +2286,14 @@ void Assembler::testq(Register dst, Immediate mask) {
|
|
|
| void Assembler::fld(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xD9, 0xC0, i);
|
| }
|
|
|
|
|
| void Assembler::fld1() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xE8);
|
| }
|
| @@ -2160,6 +2301,7 @@ void Assembler::fld1() {
|
|
|
| void Assembler::fldz() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xEE);
|
| }
|
| @@ -2167,6 +2309,7 @@ void Assembler::fldz() {
|
|
|
| void Assembler::fldpi() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xEB);
|
| }
|
| @@ -2174,6 +2317,7 @@ void Assembler::fldpi() {
|
|
|
| void Assembler::fldln2() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xED);
|
| }
|
| @@ -2181,6 +2325,7 @@ void Assembler::fldln2() {
|
|
|
| void Assembler::fld_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(adr);
|
| emit(0xD9);
|
| emit_operand(0, adr);
|
| @@ -2189,6 +2334,7 @@ void Assembler::fld_s(const Operand& adr) {
|
|
|
| void Assembler::fld_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(adr);
|
| emit(0xDD);
|
| emit_operand(0, adr);
|
| @@ -2197,6 +2343,7 @@ void Assembler::fld_d(const Operand& adr) {
|
|
|
| void Assembler::fstp_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(adr);
|
| emit(0xD9);
|
| emit_operand(3, adr);
|
| @@ -2205,6 +2352,7 @@ void Assembler::fstp_s(const Operand& adr) {
|
|
|
| void Assembler::fstp_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(adr);
|
| emit(0xDD);
|
| emit_operand(3, adr);
|
| @@ -2214,12 +2362,14 @@ void Assembler::fstp_d(const Operand& adr) {
|
| void Assembler::fstp(int index) {
|
| ASSERT(is_uint3(index));
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xDD, 0xD8, index);
|
| }
|
|
|
|
|
| void Assembler::fild_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(adr);
|
| emit(0xDB);
|
| emit_operand(0, adr);
|
| @@ -2228,6 +2378,7 @@ void Assembler::fild_s(const Operand& adr) {
|
|
|
| void Assembler::fild_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(adr);
|
| emit(0xDF);
|
| emit_operand(5, adr);
|
| @@ -2236,6 +2387,7 @@ void Assembler::fild_d(const Operand& adr) {
|
|
|
| void Assembler::fistp_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(adr);
|
| emit(0xDB);
|
| emit_operand(3, adr);
|
| @@ -2245,6 +2397,7 @@ void Assembler::fistp_s(const Operand& adr) {
|
| void Assembler::fisttp_s(const Operand& adr) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE3));
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(adr);
|
| emit(0xDB);
|
| emit_operand(1, adr);
|
| @@ -2254,6 +2407,7 @@ void Assembler::fisttp_s(const Operand& adr) {
|
| void Assembler::fisttp_d(const Operand& adr) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE3));
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(adr);
|
| emit(0xDD);
|
| emit_operand(1, adr);
|
| @@ -2262,6 +2416,7 @@ void Assembler::fisttp_d(const Operand& adr) {
|
|
|
| void Assembler::fist_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(adr);
|
| emit(0xDB);
|
| emit_operand(2, adr);
|
| @@ -2270,6 +2425,7 @@ void Assembler::fist_s(const Operand& adr) {
|
|
|
| void Assembler::fistp_d(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(adr);
|
| emit(0xDF);
|
| emit_operand(7, adr);
|
| @@ -2278,6 +2434,7 @@ void Assembler::fistp_d(const Operand& adr) {
|
|
|
| void Assembler::fabs() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xE1);
|
| }
|
| @@ -2285,6 +2442,7 @@ void Assembler::fabs() {
|
|
|
| void Assembler::fchs() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xE0);
|
| }
|
| @@ -2292,6 +2450,7 @@ void Assembler::fchs() {
|
|
|
| void Assembler::fcos() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xFF);
|
| }
|
| @@ -2299,6 +2458,7 @@ void Assembler::fcos() {
|
|
|
| void Assembler::fsin() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xFE);
|
| }
|
| @@ -2306,6 +2466,7 @@ void Assembler::fsin() {
|
|
|
| void Assembler::fyl2x() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xF1);
|
| }
|
| @@ -2313,18 +2474,21 @@ void Assembler::fyl2x() {
|
|
|
| void Assembler::fadd(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xDC, 0xC0, i);
|
| }
|
|
|
|
|
| void Assembler::fsub(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xDC, 0xE8, i);
|
| }
|
|
|
|
|
| void Assembler::fisub_s(const Operand& adr) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_optional_rex_32(adr);
|
| emit(0xDA);
|
| emit_operand(4, adr);
|
| @@ -2333,48 +2497,56 @@ void Assembler::fisub_s(const Operand& adr) {
|
|
|
| void Assembler::fmul(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xDC, 0xC8, i);
|
| }
|
|
|
|
|
| void Assembler::fdiv(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xDC, 0xF8, i);
|
| }
|
|
|
|
|
| void Assembler::faddp(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xDE, 0xC0, i);
|
| }
|
|
|
|
|
| void Assembler::fsubp(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xDE, 0xE8, i);
|
| }
|
|
|
|
|
| void Assembler::fsubrp(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xDE, 0xE0, i);
|
| }
|
|
|
|
|
| void Assembler::fmulp(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xDE, 0xC8, i);
|
| }
|
|
|
|
|
| void Assembler::fdivp(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xDE, 0xF8, i);
|
| }
|
|
|
|
|
| void Assembler::fprem() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xF8);
|
| }
|
| @@ -2382,6 +2554,7 @@ void Assembler::fprem() {
|
|
|
| void Assembler::fprem1() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xF5);
|
| }
|
| @@ -2389,12 +2562,14 @@ void Assembler::fprem1() {
|
|
|
| void Assembler::fxch(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xD9, 0xC8, i);
|
| }
|
|
|
|
|
| void Assembler::fincstp() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xF7);
|
| }
|
| @@ -2402,12 +2577,14 @@ void Assembler::fincstp() {
|
|
|
| void Assembler::ffree(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xDD, 0xC0, i);
|
| }
|
|
|
|
|
| void Assembler::ftst() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xE4);
|
| }
|
| @@ -2415,12 +2592,14 @@ void Assembler::ftst() {
|
|
|
| void Assembler::fucomp(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit_farith(0xDD, 0xE8, i);
|
| }
|
|
|
|
|
| void Assembler::fucompp() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xDA);
|
| emit(0xE9);
|
| }
|
| @@ -2428,6 +2607,7 @@ void Assembler::fucompp() {
|
|
|
| void Assembler::fucomi(int i) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xDB);
|
| emit(0xE8 + i);
|
| }
|
| @@ -2435,6 +2615,7 @@ void Assembler::fucomi(int i) {
|
|
|
| void Assembler::fucomip() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xDF);
|
| emit(0xE9);
|
| }
|
| @@ -2442,6 +2623,7 @@ void Assembler::fucomip() {
|
|
|
| void Assembler::fcompp() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xDE);
|
| emit(0xD9);
|
| }
|
| @@ -2449,6 +2631,7 @@ void Assembler::fcompp() {
|
|
|
| void Assembler::fnstsw_ax() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xDF);
|
| emit(0xE0);
|
| }
|
| @@ -2456,12 +2639,14 @@ void Assembler::fnstsw_ax() {
|
|
|
| void Assembler::fwait() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x9B);
|
| }
|
|
|
|
|
| void Assembler::frndint() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xD9);
|
| emit(0xFC);
|
| }
|
| @@ -2469,6 +2654,7 @@ void Assembler::frndint() {
|
|
|
| void Assembler::fnclex() {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xDB);
|
| emit(0xE2);
|
| }
|
| @@ -2478,6 +2664,7 @@ void Assembler::sahf() {
|
| // TODO(X64): Test for presence. Not all 64-bit intel CPU's have sahf
|
| // in 64-bit mode. Test CpuID.
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x9E);
|
| }
|
|
|
| @@ -2493,6 +2680,7 @@ void Assembler::emit_farith(int b1, int b2, int i) {
|
|
|
| void Assembler::movd(XMMRegister dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2503,6 +2691,7 @@ void Assembler::movd(XMMRegister dst, Register src) {
|
|
|
| void Assembler::movd(Register dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_optional_rex_32(src, dst);
|
| emit(0x0F);
|
| @@ -2513,6 +2702,7 @@ void Assembler::movd(Register dst, XMMRegister src) {
|
|
|
| void Assembler::movq(XMMRegister dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_rex_64(dst, src);
|
| emit(0x0F);
|
| @@ -2523,6 +2713,7 @@ void Assembler::movq(XMMRegister dst, Register src) {
|
|
|
| void Assembler::movq(Register dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_rex_64(src, dst);
|
| emit(0x0F);
|
| @@ -2532,7 +2723,9 @@ void Assembler::movq(Register dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::movdqa(const Operand& dst, XMMRegister src) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_rex_64(src, dst);
|
| emit(0x0F);
|
| @@ -2542,7 +2735,9 @@ void Assembler::movdqa(const Operand& dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::movdqa(XMMRegister dst, const Operand& src) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_rex_64(dst, src);
|
| emit(0x0F);
|
| @@ -2554,6 +2749,7 @@ void Assembler::movdqa(XMMRegister dst, const Operand& src) {
|
| void Assembler::extractps(Register dst, XMMRegister src, byte imm8) {
|
| ASSERT(is_uint2(imm8));
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2566,6 +2762,7 @@ void Assembler::extractps(Register dst, XMMRegister src, byte imm8) {
|
|
|
| void Assembler::movsd(const Operand& dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2); // double
|
| emit_optional_rex_32(src, dst);
|
| emit(0x0F);
|
| @@ -2576,6 +2773,7 @@ void Assembler::movsd(const Operand& dst, XMMRegister src) {
|
|
|
| void Assembler::movsd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2); // double
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2586,6 +2784,7 @@ void Assembler::movsd(XMMRegister dst, XMMRegister src) {
|
|
|
| void Assembler::movsd(XMMRegister dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2); // double
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2596,6 +2795,7 @@ void Assembler::movsd(XMMRegister dst, const Operand& src) {
|
|
|
| void Assembler::movss(XMMRegister dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF3); // single
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2606,6 +2806,7 @@ void Assembler::movss(XMMRegister dst, const Operand& src) {
|
|
|
| void Assembler::movss(const Operand& src, XMMRegister dst) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF3); // single
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2616,6 +2817,7 @@ void Assembler::movss(const Operand& src, XMMRegister dst) {
|
|
|
| void Assembler::cvttss2si(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF3);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2626,6 +2828,7 @@ void Assembler::cvttss2si(Register dst, const Operand& src) {
|
|
|
| void Assembler::cvttss2si(Register dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF3);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2636,6 +2839,7 @@ void Assembler::cvttss2si(Register dst, XMMRegister src) {
|
|
|
| void Assembler::cvttsd2si(Register dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2646,6 +2850,7 @@ void Assembler::cvttsd2si(Register dst, const Operand& src) {
|
|
|
| void Assembler::cvttsd2si(Register dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2656,6 +2861,7 @@ void Assembler::cvttsd2si(Register dst, XMMRegister src) {
|
|
|
| void Assembler::cvttsd2siq(Register dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_rex_64(dst, src);
|
| emit(0x0F);
|
| @@ -2666,6 +2872,7 @@ void Assembler::cvttsd2siq(Register dst, XMMRegister src) {
|
|
|
| void Assembler::cvtlsi2sd(XMMRegister dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2676,6 +2883,7 @@ void Assembler::cvtlsi2sd(XMMRegister dst, const Operand& src) {
|
|
|
| void Assembler::cvtlsi2sd(XMMRegister dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2686,6 +2894,7 @@ void Assembler::cvtlsi2sd(XMMRegister dst, Register src) {
|
|
|
| void Assembler::cvtlsi2ss(XMMRegister dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF3);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2696,6 +2905,7 @@ void Assembler::cvtlsi2ss(XMMRegister dst, Register src) {
|
|
|
| void Assembler::cvtqsi2sd(XMMRegister dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_rex_64(dst, src);
|
| emit(0x0F);
|
| @@ -2706,6 +2916,7 @@ void Assembler::cvtqsi2sd(XMMRegister dst, Register src) {
|
|
|
| void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF3);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2716,6 +2927,7 @@ void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
|
|
|
| void Assembler::cvtss2sd(XMMRegister dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF3);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2726,6 +2938,7 @@ void Assembler::cvtss2sd(XMMRegister dst, const Operand& src) {
|
|
|
| void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2736,6 +2949,7 @@ void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) {
|
|
|
| void Assembler::cvtsd2si(Register dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2746,6 +2960,7 @@ void Assembler::cvtsd2si(Register dst, XMMRegister src) {
|
|
|
| void Assembler::cvtsd2siq(Register dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_rex_64(dst, src);
|
| emit(0x0F);
|
| @@ -2756,6 +2971,7 @@ void Assembler::cvtsd2siq(Register dst, XMMRegister src) {
|
|
|
| void Assembler::addsd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2766,6 +2982,7 @@ void Assembler::addsd(XMMRegister dst, XMMRegister src) {
|
|
|
| void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2776,6 +2993,7 @@ void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
|
|
|
| void Assembler::subsd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2786,6 +3004,7 @@ void Assembler::subsd(XMMRegister dst, XMMRegister src) {
|
|
|
| void Assembler::divsd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2796,6 +3015,7 @@ void Assembler::divsd(XMMRegister dst, XMMRegister src) {
|
|
|
| void Assembler::andpd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2806,6 +3026,7 @@ void Assembler::andpd(XMMRegister dst, XMMRegister src) {
|
|
|
| void Assembler::orpd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2816,6 +3037,7 @@ void Assembler::orpd(XMMRegister dst, XMMRegister src) {
|
|
|
| void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2826,6 +3048,7 @@ void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
|
|
|
| void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0xF2);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0F);
|
| @@ -2836,6 +3059,7 @@ void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
|
|
|
| void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0f);
|
| @@ -2846,6 +3070,7 @@ void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
|
|
|
| void Assembler::ucomisd(XMMRegister dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0f);
|
| @@ -2856,6 +3081,7 @@ void Assembler::ucomisd(XMMRegister dst, const Operand& src) {
|
|
|
| void Assembler::movmskpd(Register dst, XMMRegister src) {
|
| EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| emit(0x66);
|
| emit_optional_rex_32(dst, src);
|
| emit(0x0f);
|
|
|