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| 1 // Copyright 2010 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are |
| 4 // met: |
| 5 // |
| 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided |
| 11 // with the distribution. |
| 12 // * Neither the name of Google Inc. nor the names of its |
| 13 // contributors may be used to endorse or promote products derived |
| 14 // from this software without specific prior written permission. |
| 15 // |
| 16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 |
| 28 // This file is an internal atomic implementation, use atomicops.h instead. |
| 29 |
| 30 #ifndef V8_ATOMICOPS_INTERNALS_MIPS_GCC_H_ |
| 31 #define V8_ATOMICOPS_INTERNALS_MIPS_GCC_H_ |
| 32 |
| 33 #define ATOMICOPS_COMPILER_BARRIER() __asm__ __volatile__("sync" : : : "memory") |
| 34 |
| 35 namespace v8 { |
| 36 namespace internal { |
| 37 |
| 38 // Atomically execute: |
| 39 // result = *ptr; |
| 40 // if (*ptr == old_value) |
| 41 // *ptr = new_value; |
| 42 // return result; |
| 43 // |
| 44 // I.e., replace "*ptr" with "new_value" if "*ptr" used to be "old_value". |
| 45 // Always return the old value of "*ptr" |
| 46 // |
| 47 // This routine implies no memory barriers. |
| 48 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, |
| 49 Atomic32 old_value, |
| 50 Atomic32 new_value) { |
| 51 Atomic32 prev; |
| 52 __asm__ __volatile__("1:\n" |
| 53 "ll %0, %1\n" // prev = *ptr |
| 54 "bne %0, %3, 2f\n" // if (prev != old_value) goto 2 |
| 55 "nop\n" // delay slot nop |
| 56 "sc %2, %1\n" // *ptr = new_value (with atomic check) |
| 57 "beqz %2, 1b\n" // start again on atomic error |
| 58 "nop\n" // delay slot nop |
| 59 "2:\n" |
| 60 : "=&r" (prev), "=m" (*ptr), "+&r" (new_value) |
| 61 : "Ir" (old_value), "r" (new_value), "m" (*ptr) |
| 62 : "memory"); |
| 63 return prev; |
| 64 } |
| 65 |
| 66 // Atomically store new_value into *ptr, returning the previous value held in |
| 67 // *ptr. This routine implies no memory barriers. |
| 68 inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, |
| 69 Atomic32 new_value) { |
| 70 Atomic32 temp, old; |
| 71 __asm__ __volatile__("1:\n" |
| 72 "ll %1, %2\n" // old = *ptr |
| 73 "move %0, %3\n" // temp = new_value |
| 74 "sc %0, %2\n" // *ptr = temp (with atomic check) |
| 75 "beqz %0, 1b\n" // start again on atomic error |
| 76 "nop\n" // delay slot nop |
| 77 : "=&r" (temp), "=&r" (old), "=m" (*ptr) |
| 78 : "r" (new_value), "m" (*ptr) |
| 79 : "memory"); |
| 80 |
| 81 return old; |
| 82 } |
| 83 |
| 84 // Atomically increment *ptr by "increment". Returns the new value of |
| 85 // *ptr with the increment applied. This routine implies no memory barriers. |
| 86 inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr, |
| 87 Atomic32 increment) { |
| 88 Atomic32 temp, temp2; |
| 89 |
| 90 __asm__ __volatile__("1:\n" |
| 91 "ll %0, %2\n" // temp = *ptr |
| 92 "addu %0, %3\n" // temp = temp + increment |
| 93 "move %1, %0\n" // temp2 = temp |
| 94 "sc %0, %2\n" // *ptr = temp (with atomic check) |
| 95 "beqz %0, 1b\n" // start again on atomic error |
| 96 "nop\n" // delay slot nop |
| 97 : "=&r" (temp), "=&r" (temp2), "=m" (*ptr) |
| 98 : "Ir" (increment), "m" (*ptr) |
| 99 : "memory"); |
| 100 // temp2 now holds the final value. |
| 101 return temp2; |
| 102 } |
| 103 |
| 104 inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr, |
| 105 Atomic32 increment) { |
| 106 Atomic32 res = NoBarrier_AtomicIncrement(ptr, increment); |
| 107 ATOMICOPS_COMPILER_BARRIER(); |
| 108 return res; |
| 109 } |
| 110 |
| 111 // "Acquire" operations |
| 112 // ensure that no later memory access can be reordered ahead of the operation. |
| 113 // "Release" operations ensure that no previous memory access can be reordered |
| 114 // after the operation. "Barrier" operations have both "Acquire" and "Release" |
| 115 // semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory |
| 116 // access. |
| 117 inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr, |
| 118 Atomic32 old_value, |
| 119 Atomic32 new_value) { |
| 120 Atomic32 x = NoBarrier_CompareAndSwap(ptr, old_value, new_value); |
| 121 ATOMICOPS_COMPILER_BARRIER(); |
| 122 return x; |
| 123 } |
| 124 |
| 125 inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr, |
| 126 Atomic32 old_value, |
| 127 Atomic32 new_value) { |
| 128 ATOMICOPS_COMPILER_BARRIER(); |
| 129 return NoBarrier_CompareAndSwap(ptr, old_value, new_value); |
| 130 } |
| 131 |
| 132 inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) { |
| 133 *ptr = value; |
| 134 } |
| 135 |
| 136 inline void MemoryBarrier() { |
| 137 ATOMICOPS_COMPILER_BARRIER(); |
| 138 } |
| 139 |
| 140 inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) { |
| 141 *ptr = value; |
| 142 MemoryBarrier(); |
| 143 } |
| 144 |
| 145 inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) { |
| 146 MemoryBarrier(); |
| 147 *ptr = value; |
| 148 } |
| 149 |
| 150 inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) { |
| 151 return *ptr; |
| 152 } |
| 153 |
| 154 inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) { |
| 155 Atomic32 value = *ptr; |
| 156 MemoryBarrier(); |
| 157 return value; |
| 158 } |
| 159 |
| 160 inline Atomic32 Release_Load(volatile const Atomic32* ptr) { |
| 161 MemoryBarrier(); |
| 162 return *ptr; |
| 163 } |
| 164 |
| 165 } } // namespace v8::internal |
| 166 |
| 167 #undef ATOMICOPS_COMPILER_BARRIER |
| 168 |
| 169 #endif // V8_ATOMICOPS_INTERNALS_MIPS_GCC_H_ |
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