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1 /* | |
2 * (C) Copyright 2010 | |
3 * NVIDIA Corporation <www.nvidia.com> | |
4 * | |
5 * See file CREDITS for list of people who contributed to this | |
6 * project. | |
7 * | |
8 * This program is free software; you can redistribute it and/or | |
9 * modify it under the terms of the GNU General Public License as | |
10 * published by the Free Software Foundation; either version 2 of | |
11 * the License, or (at your option) any later version. | |
12 * | |
13 * This program is distributed in the hope that it will be useful, | |
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 * GNU General Public License for more details. | |
17 * | |
18 * You should have received a copy of the GNU General Public License | |
19 * along with this program; if not, write to the Free Software | |
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 * MA 02111-1307 USA | |
22 */ | |
23 | |
24 #ifndef __configs_chromeos_tegra2_common_h__ | |
25 #define __configs_chromeos_tegra2_common_h__ | |
26 | |
27 #include <configs/chromeos/common.h> | |
28 #include <asm/arch/tegra2.h> | |
29 | |
30 /* | |
31 * High Level Configuration Options | |
32 */ | |
33 #define CONFIG_ARMCORTEXA9 1 | |
34 #define CONFIG_TEGRA2 1 | |
35 #define CONFIG_MACH_TEGRA_GENERIC 1 | |
36 #define CONFIG_L2_OFF 1 | |
37 | |
38 #define CONFIG_ENABLE_CORTEXA9 1 | |
39 #undef TEGRA2_TRACE | |
40 | |
41 #undef CONFIG_USE_IRQ | |
42 #define CONFIG_ARCH_CPU_INIT | |
43 #define CONFIG_MISC_INIT_R | |
44 #define CONFIG_SKIP_LOWLEVEL_INIT | |
45 | |
46 #define CONFIG_SYS_64BIT_STRTOUL 1 | |
47 #define CONFIG_SYS_64BIT_VSPRINTF 1 | |
48 | |
49 /* | |
50 * PllX Configuration | |
51 */ | |
52 #define CONFIG_SYS_CPU_OSC_FREQUENCY 1000000 /* Set CPU clock to 1GHz
*/ | |
53 | |
54 #define CONFIG_SYS_NO_FLASH | |
55 | |
56 /* Enable Warmboot code and lp0_vec */ | |
57 #define CONFIG_TEGRA2_LP0 1 | |
58 | |
59 #ifdef CONFIG_TEGRA2_LP0 | |
60 #define TEGRA_LP0_DEFAULT_ADDR 0x1C406000 | |
61 #define TEGRA_LP0_SIZE 0x2000 | |
62 | |
63 #define TEGRA_LP0_CMDLINE \ | |
64 "lp0_vec=" QUOTE(TEGRA_LP0_SIZE) "@" QUOTE(TEGRA_LP0_DEFAULT_ADDR) " " | |
65 #else | |
66 #define TEGRA_LP0_CMDLINE | |
67 #endif | |
68 | |
69 /* Put kcrashmem at 32MB which is free */ | |
70 #define TEGRA_KCRASHMEM_DEFAULT_ADDR 0x02000000 | |
71 #define TEGRA_KCRASHMEM_SIZE 0x100000 | |
72 | |
73 #define TEGRA_KCRASHMEM_CMDLINE "kcrashmem=" QUOTE(TEGRA_KCRASHMEM_SIZE) "@" \ | |
74 QUOTE(TEGRA_KCRASHMEM_DEFAULT_ADDR) \ | |
75 | |
76 /* Add in our required kernel cmdline arguments */ | |
77 #define CONFIG_PLATFORM_EXTRAS_ARCH \ | |
78 TEGRA_LP0_CMDLINE \ | |
79 TEGRA_KCRASHMEM_CMDLINE | |
80 | |
81 #define CONFIG_BOOTDELAY 2 /* 2s to break to prompt */ | |
82 #define CONFIG_EXTRA_ENV_SETTINGS_ARCH_COMMON \ | |
83 "scriptaddr=0x408000\0" \ | |
84 "script_img=/u-boot/boot.scr.uimg\0" \ | |
85 "mmc0_boot=setenv devnum 0; run mmc_boot;\0" \ | |
86 "mmc1_boot=setenv devnum 1; run mmc_boot;\0" \ | |
87 "usb0_boot=usb start 0; run usb_boot;\0" \ | |
88 "usb1_boot=usb start 1; run usb_boot;\0" \ | |
89 "scr_boot=fatload ${devtype} ${devnum}:c ${scriptaddr} ${script_img};" \ | |
90 "source ${scriptaddr};" \ | |
91 "read ${devtype} ${devnum}:${kernelpart} ${scriptaddr} 0 10;" \ | |
92 "source ${scriptaddr};\0" \ | |
93 "mmc_boot=mmc init ${devnum};" \ | |
94 "setenv devtype mmc;" \ | |
95 "setenv devname mmcblk${devnum}p;" \ | |
96 "run scr_boot;\0" \ | |
97 "usb_boot=setenv devtype usb;" \ | |
98 "setenv devnum 0;" \ | |
99 "setenv devname sda;" \ | |
100 "run scr_boot;\0" | |
101 | |
102 #define CONFIG_SYS_LOAD_ADDR 0xA00800 | |
103 | |
104 #define CONFIG_SYS_HZ 1000 | |
105 | |
106 /*----------------------------------------------------------------------- | |
107 * Stack sizes | |
108 * | |
109 * The stack sizes are set up in start.S using the settings below | |
110 */ | |
111 #define CONFIG_STACKBASE (SZ_32M + SZ_8M) | |
112 #define CONFIG_STACKSIZE SZ_128K | |
113 | |
114 #ifdef CONFIG_USE_IRQ | |
115 #define CONFIG_STACKSIZE_IRQ SZ_4K | |
116 #define CONFIG_STACKSIZE_FIQ SZ_4K | |
117 #endif | |
118 | |
119 /*----------------------------------------------------------------------- | |
120 * Physical Memory Map | |
121 */ | |
122 #define CONFIG_NR_DRAM_BANKS 1 | |
123 #define PHYS_SDRAM_1 TEGRA2_SDRC_CS0 | |
124 #define PHYS_SDRAM_1_SIZE SZ_512M | |
125 | |
126 /*----------------------------------------------------------------------- | |
127 * Common macros for constructing configurations. These are being used to | |
128 * move configuration data out of the board C files and into the included | |
129 * configuration files. The final goal is to move this configuration data | |
130 * into a FDT blob. | |
131 * | |
132 * Tracker: http://code.google.com/p/chromium-os/issues/detail?id=11623 | |
133 */ | |
134 #define TEGRA_GPIO_INIT(_gpio, _state) { _gpio, _state }, | |
135 | |
136 #define TEGRA_CLOCK(_name, _parent, _rate, _enabled) \ | |
137 { _name, _parent, _rate, _enabled }, | |
138 | |
139 #define TEGRA_RESOURCE(_name, _start, _length) \ | |
140 { \ | |
141 .name = _name, \ | |
142 .start = _start, \ | |
143 .end = _start + _length - 1, \ | |
144 }, | |
145 | |
146 #define TEGRA_PANEL(_name, _value) ._name = _value, | |
147 | |
148 /*----------------------------------------------------------------------- | |
149 * Include component configurations. | |
150 */ | |
151 | |
152 #include <configs/chromeos/tegra2/parts/gpio.h> | |
153 #include <configs/chromeos/tegra2/parts/i2c.h> | |
154 #include <configs/chromeos/tegra2/parts/lcd.h> | |
155 #include <configs/chromeos/tegra2/parts/mmc.h> | |
156 #include <configs/chromeos/tegra2/parts/pinmux.h> | |
157 #include <configs/chromeos/tegra2/parts/uart.h> | |
158 | |
159 #define CONFIG_DISPLAY_BOARDINFO 1 | |
160 | |
161 /*----------------------------------------------------------------------- | |
162 * Statically Allocated Buffers for Verified Boot | |
163 */ | |
164 #define CONFIG_VB_SHARED_DATA_BLOB 0x10000000 | |
165 #define CONFIG_VB_SHARED_DATA_SIZE VB_SHARED_DATA_REC_SIZE | |
166 | |
167 /* | |
168 * Kernel must be loaded to a fixed address because it is a part of the | |
169 * verified boot security check. | |
170 * | |
171 * You have to make sure that memory range starting from CONFIG_LOADADDR | |
172 * has at least CONFIG_MAX_KERNEL_SIZE free space available. | |
173 */ | |
174 #define CONFIG_LOADADDR 0x00100000 | |
175 | |
176 /* A sufficiently large buffer size for holding kernel image */ | |
177 #define CONFIG_MAX_KERNEL_SIZE 0x00800000 | |
178 | |
179 #endif /*__configs_chromeos_tegra2_common_h__*/ | |
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