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Issue 6724034: Fix presubmit errors in r7388 (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 9 years, 9 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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1469 void Assembler::tlt(Register rs, Register rt, uint16_t code) { 1469 void Assembler::tlt(Register rs, Register rt, uint16_t code) {
1470 ASSERT(is_uint10(code)); 1470 ASSERT(is_uint10(code));
1471 Instr instr = 1471 Instr instr =
1472 SPECIAL | TLT | rs.code() << kRsShift | rt.code() << kRtShift | code << 6; 1472 SPECIAL | TLT | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
1473 emit(instr); 1473 emit(instr);
1474 } 1474 }
1475 1475
1476 1476
1477 void Assembler::tltu(Register rs, Register rt, uint16_t code) { 1477 void Assembler::tltu(Register rs, Register rt, uint16_t code) {
1478 ASSERT(is_uint10(code)); 1478 ASSERT(is_uint10(code));
1479 Instr instr = 1479 Instr instr =
1480 SPECIAL | TLTU | rs.code() << kRsShift | rt.code() << kRtShift | code << 6 ; 1480 SPECIAL | TLTU | rs.code() << kRsShift
1481 | rt.code() << kRtShift | code << 6;
1481 emit(instr); 1482 emit(instr);
1482 } 1483 }
1483 1484
1484 1485
1485 void Assembler::teq(Register rs, Register rt, uint16_t code) { 1486 void Assembler::teq(Register rs, Register rt, uint16_t code) {
1486 ASSERT(is_uint10(code)); 1487 ASSERT(is_uint10(code));
1487 Instr instr = 1488 Instr instr =
1488 SPECIAL | TEQ | rs.code() << kRsShift | rt.code() << kRtShift | code << 6; 1489 SPECIAL | TEQ | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
1489 emit(instr); 1490 emit(instr);
1490 } 1491 }
(...skipping 592 matching lines...) Expand 10 before | Expand all | Expand 10 after
2083 *(p+1) = ORI | rt_code | (rt_code << 5) | (itarget & kImm16Mask); 2084 *(p+1) = ORI | rt_code | (rt_code << 5) | (itarget & kImm16Mask);
2084 } 2085 }
2085 2086
2086 CPU::FlushICache(pc, 2 * sizeof(int32_t)); 2087 CPU::FlushICache(pc, 2 * sizeof(int32_t));
2087 } 2088 }
2088 2089
2089 2090
2090 } } // namespace v8::internal 2091 } } // namespace v8::internal
2091 2092
2092 #endif // V8_TARGET_ARCH_MIPS 2093 #endif // V8_TARGET_ARCH_MIPS
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