ichspi.c: lower down the ICH7 chipset CDS timeout from 60s to 1ms.

ichspi.c

 /*
  * This file is part of the flashrom project.
  *
  * Copyright (C) 2008 Stefan Wildemann <stefan.wildemann@kontron.com>
  * Copyright (C) 2008 Claus Gindhart <claus.gindhart@kontron.com>
  * Copyright (C) 2008 Dominik Geyer <dominik.geyer@kontron.com>
  * Copyright (C) 2008 coresystems GmbH <info@coresystems.de>
  * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger
  *
  * This program is free software; you can redistribute it and/or modify
@@ skipping 552 matching lines @@
                 temp16 |= SPIC_ACS;
                 break;
         }
 
         /* Start */
         temp16 |= SPIC_SCGO;
 
         /* write it */
         REGWRITE16(ICH7_REG_SPIC, temp16);
 
-        /* wait for cycle complete */
-        timeout = 100 * 1000 * 60;      // 60s is a looong timeout.
+        /* Original timeout is 60 minutes, which is too excessive.
+         * Reduce to 30 secs for chip full erase (around 10 secs).
+         * We also exit the loop if the error bit is set.
+         */
+        timeout = 100 * 1000 * 30;
         while (((REGREAD16(ICH7_REG_SPIS) & SPIS_CDS) == 0) && --timeout) {
                 programmer_delay(10);
+                if (REGREAD16(ICH7_REG_SPIS) & SPIS_FCERR)
+                        break;  /* Transaction error */
         }
         if (!timeout) {
-                msg_perr("timeout\n");
+                msg_perr("ICH7 CDS timeout\n");
         }
 
         /* FIXME: make sure we do not needlessly cause transaction errors. */
         if ((REGREAD16(ICH7_REG_SPIS) & SPIS_FCERR) != 0) {
                 msg_pdbg("Transaction error!\n");
                 return 1;
         }
 
         if ((!write_cmd) && (datalength != 0)) {
                 for (a = 0; a < datalength; a++) {
@@ skipping 578 matching lines @@
                 msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n");
                 ichspi_lock = 1;
         }
 
         ich_init_opcodes();
 
         return 0;
 }
 
 #endif