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Issue 6696037: Fix incorrect assumption on bit-and on ARM (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 9 years, 9 months ago
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1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 1141 matching lines...) Expand 10 before | Expand all | Expand 10 after
1152 case Token::SHL: 1152 case Token::SHL:
1153 ASSERT(!reversed_); 1153 ASSERT(!reversed_);
1154 if (shift_value != 0) { 1154 if (shift_value != 0) {
1155 __ mov(int32, Operand(int32, LSL, shift_value)); 1155 __ mov(int32, Operand(int32, LSL, shift_value));
1156 } 1156 }
1157 break; 1157 break;
1158 default: UNREACHABLE(); 1158 default: UNREACHABLE();
1159 } 1159 }
1160 // Check that the *signed* result fits in a smi. Not necessary for AND, SAR 1160 // Check that the *signed* result fits in a smi. Not necessary for AND, SAR
1161 // if the shift if more than 0 or SHR if the shit is more than 1. 1161 // if the shift if more than 0 or SHR if the shit is more than 1.
1162 if (!( (op_ == Token::AND) || 1162 if (!( (op_ == Token::AND && value_ >= 0) ||
1163 ((op_ == Token::SAR) && (shift_value > 0)) || 1163 ((op_ == Token::SAR) && (shift_value > 0)) ||
1164 ((op_ == Token::SHR) && (shift_value > 1)))) { 1164 ((op_ == Token::SHR) && (shift_value > 1)))) {
1165 __ add(r3, int32, Operand(0x40000000), SetCC); 1165 __ add(r3, int32, Operand(0x40000000), SetCC);
1166 __ b(mi, &result_not_a_smi); 1166 __ b(mi, &result_not_a_smi);
1167 } 1167 }
1168 __ mov(tos_register_, Operand(int32, LSL, kSmiTagSize)); 1168 __ mov(tos_register_, Operand(int32, LSL, kSmiTagSize));
1169 Exit(); 1169 Exit();
1170 1170
1171 if (result_not_a_smi.is_linked()) { 1171 if (result_not_a_smi.is_linked()) {
1172 __ bind(&result_not_a_smi); 1172 __ bind(&result_not_a_smi);
(...skipping 240 matching lines...) Expand 10 before | Expand all | Expand 10 after
1413 new DeferredInlineSmiOperation(op, int_value, reversed, mode, tos); 1413 new DeferredInlineSmiOperation(op, int_value, reversed, mode, tos);
1414 __ tst(tos, Operand(kSmiTagMask)); 1414 __ tst(tos, Operand(kSmiTagMask));
1415 deferred->JumpToNonSmiInput(ne); 1415 deferred->JumpToNonSmiInput(ne);
1416 switch (op) { 1416 switch (op) {
1417 case Token::BIT_OR: __ orr(tos, tos, Operand(value)); break; 1417 case Token::BIT_OR: __ orr(tos, tos, Operand(value)); break;
1418 case Token::BIT_XOR: __ eor(tos, tos, Operand(value)); break; 1418 case Token::BIT_XOR: __ eor(tos, tos, Operand(value)); break;
1419 case Token::BIT_AND: __ And(tos, tos, Operand(value)); break; 1419 case Token::BIT_AND: __ And(tos, tos, Operand(value)); break;
1420 default: UNREACHABLE(); 1420 default: UNREACHABLE();
1421 } 1421 }
1422 deferred->BindExit(); 1422 deferred->BindExit();
1423 TypeInfo result_type = 1423 TypeInfo result_type = TypeInfo::Integer32();
1424 (op == Token::BIT_AND) ? TypeInfo::Smi() : TypeInfo::Integer32(); 1424 if (op == Token::BIT_AND && int_value >= 0) {
1425 result_type = TypeInfo::Smi();
1426 }
1425 frame_->EmitPush(tos, result_type); 1427 frame_->EmitPush(tos, result_type);
1426 } 1428 }
1427 break; 1429 break;
1428 } 1430 }
1429 1431
1430 case Token::SHL: 1432 case Token::SHL:
1431 if (reversed) { 1433 if (reversed) {
1432 ASSERT(both_sides_are_smi); 1434 ASSERT(both_sides_are_smi);
1433 int max_shift = 0; 1435 int max_shift = 0;
1434 int max_result = int_value == 0 ? 1 : int_value; 1436 int max_result = int_value == 0 ? 1 : int_value;
(...skipping 5970 matching lines...) Expand 10 before | Expand all | Expand 10 after
7405 BinaryOpIC::GetName(runtime_operands_type_)); 7407 BinaryOpIC::GetName(runtime_operands_type_));
7406 return name_; 7408 return name_;
7407 } 7409 }
7408 7410
7409 7411
7410 #undef __ 7412 #undef __
7411 7413
7412 } } // namespace v8::internal 7414 } } // namespace v8::internal
7413 7415
7414 #endif // V8_TARGET_ARCH_ARM 7416 #endif // V8_TARGET_ARCH_ARM
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