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Issue 6685088: Merge isolates to bleeding_edge. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 9 years, 9 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 30 matching lines...) Expand all
41 #include "disassembler.h" 41 #include "disassembler.h"
42 #include "macro-assembler.h" 42 #include "macro-assembler.h"
43 #include "serialize.h" 43 #include "serialize.h"
44 44
45 namespace v8 { 45 namespace v8 {
46 namespace internal { 46 namespace internal {
47 47
48 // ----------------------------------------------------------------------------- 48 // -----------------------------------------------------------------------------
49 // Implementation of CpuFeatures 49 // Implementation of CpuFeatures
50 50
51 // Safe default is no features. 51 CpuFeatures::CpuFeatures()
52 uint64_t CpuFeatures::supported_ = 0; 52 : supported_(0),
53 uint64_t CpuFeatures::enabled_ = 0; 53 enabled_(0),
54 uint64_t CpuFeatures::found_by_runtime_probing_ = 0; 54 found_by_runtime_probing_(0) {
55 }
55 56
56 57
57 // The Probe method needs executable memory, so it uses Heap::CreateCode. 58 // The Probe method needs executable memory, so it uses Heap::CreateCode.
58 // Allocation failure is silent and leads to safe default. 59 // Allocation failure is silent and leads to safe default.
59 void CpuFeatures::Probe(bool portable) { 60 void CpuFeatures::Probe(bool portable) {
60 ASSERT(Heap::HasBeenSetup()); 61 ASSERT(HEAP->HasBeenSetup());
61 ASSERT(supported_ == 0); 62 ASSERT(supported_ == 0);
62 if (portable && Serializer::enabled()) { 63 if (portable && Serializer::enabled()) {
63 supported_ |= OS::CpuFeaturesImpliedByPlatform(); 64 supported_ |= OS::CpuFeaturesImpliedByPlatform();
64 return; // No features if we might serialize. 65 return; // No features if we might serialize.
65 } 66 }
66 67
67 Assembler assm(NULL, 0); 68 Assembler assm(NULL, 0);
68 Label cpuid, done; 69 Label cpuid, done;
69 #define __ assm. 70 #define __ assm.
70 // Save old esp, since we are going to modify the stack. 71 // Save old esp, since we are going to modify the stack.
(...skipping 42 matching lines...) Expand 10 before | Expand all | Expand 10 after
113 __ mov(esp, Operand(ebp)); 114 __ mov(esp, Operand(ebp));
114 __ pop(ebx); 115 __ pop(ebx);
115 __ pop(ecx); 116 __ pop(ecx);
116 __ popfd(); 117 __ popfd();
117 __ pop(ebp); 118 __ pop(ebp);
118 __ ret(0); 119 __ ret(0);
119 #undef __ 120 #undef __
120 121
121 CodeDesc desc; 122 CodeDesc desc;
122 assm.GetCode(&desc); 123 assm.GetCode(&desc);
123
124 Object* code; 124 Object* code;
125 { MaybeObject* maybe_code = Heap::CreateCode(desc, 125 { MaybeObject* maybe_code = HEAP->CreateCode(desc,
126 Code::ComputeFlags(Code::STUB), 126 Code::ComputeFlags(Code::STUB),
127 Handle<Code>::null()); 127 Handle<Code>::null());
128 if (!maybe_code->ToObject(&code)) return; 128 if (!maybe_code->ToObject(&code)) return;
129 } 129 }
130 if (!code->IsCode()) return; 130 if (!code->IsCode()) return;
131 131
132 PROFILE(CodeCreateEvent(Logger::BUILTIN_TAG, 132 PROFILE(ISOLATE,
133 CodeCreateEvent(Logger::BUILTIN_TAG,
133 Code::cast(code), "CpuFeatures::Probe")); 134 Code::cast(code), "CpuFeatures::Probe"));
134 typedef uint64_t (*F0)(); 135 typedef uint64_t (*F0)();
135 F0 probe = FUNCTION_CAST<F0>(Code::cast(code)->entry()); 136 F0 probe = FUNCTION_CAST<F0>(Code::cast(code)->entry());
136 supported_ = probe(); 137 supported_ = probe();
137 found_by_runtime_probing_ = supported_; 138 found_by_runtime_probing_ = supported_;
138 uint64_t os_guarantees = OS::CpuFeaturesImpliedByPlatform(); 139 uint64_t os_guarantees = OS::CpuFeaturesImpliedByPlatform();
139 supported_ |= os_guarantees; 140 supported_ |= os_guarantees;
140 found_by_runtime_probing_ &= portable ? ~os_guarantees : 0; 141 found_by_runtime_probing_ &= portable ? ~os_guarantees : 0;
141 } 142 }
142 143
(...skipping 145 matching lines...) Expand 10 before | Expand all | Expand 10 after
288 289
289 // Emit a single byte. Must always be inlined. 290 // Emit a single byte. Must always be inlined.
290 #define EMIT(x) \ 291 #define EMIT(x) \
291 *pc_++ = (x) 292 *pc_++ = (x)
292 293
293 294
294 #ifdef GENERATED_CODE_COVERAGE 295 #ifdef GENERATED_CODE_COVERAGE
295 static void InitCoverageLog(); 296 static void InitCoverageLog();
296 #endif 297 #endif
297 298
298 // Spare buffer.
299 byte* Assembler::spare_buffer_ = NULL;
300
301 Assembler::Assembler(void* buffer, int buffer_size) 299 Assembler::Assembler(void* buffer, int buffer_size)
302 : positions_recorder_(this), 300 : positions_recorder_(this),
303 emit_debug_code_(FLAG_debug_code) { 301 emit_debug_code_(FLAG_debug_code) {
302 Isolate* isolate = Isolate::Current();
304 if (buffer == NULL) { 303 if (buffer == NULL) {
305 // Do our own buffer management. 304 // Do our own buffer management.
306 if (buffer_size <= kMinimalBufferSize) { 305 if (buffer_size <= kMinimalBufferSize) {
307 buffer_size = kMinimalBufferSize; 306 buffer_size = kMinimalBufferSize;
308 307
309 if (spare_buffer_ != NULL) { 308 if (isolate->assembler_spare_buffer() != NULL) {
310 buffer = spare_buffer_; 309 buffer = isolate->assembler_spare_buffer();
311 spare_buffer_ = NULL; 310 isolate->set_assembler_spare_buffer(NULL);
312 } 311 }
313 } 312 }
314 if (buffer == NULL) { 313 if (buffer == NULL) {
315 buffer_ = NewArray<byte>(buffer_size); 314 buffer_ = NewArray<byte>(buffer_size);
316 } else { 315 } else {
317 buffer_ = static_cast<byte*>(buffer); 316 buffer_ = static_cast<byte*>(buffer);
318 } 317 }
319 buffer_size_ = buffer_size; 318 buffer_size_ = buffer_size;
320 own_buffer_ = true; 319 own_buffer_ = true;
321 } else { 320 } else {
(...skipping 19 matching lines...) Expand all
341 reloc_info_writer.Reposition(buffer_ + buffer_size, pc_); 340 reloc_info_writer.Reposition(buffer_ + buffer_size, pc_);
342 341
343 last_pc_ = NULL; 342 last_pc_ = NULL;
344 #ifdef GENERATED_CODE_COVERAGE 343 #ifdef GENERATED_CODE_COVERAGE
345 InitCoverageLog(); 344 InitCoverageLog();
346 #endif 345 #endif
347 } 346 }
348 347
349 348
350 Assembler::~Assembler() { 349 Assembler::~Assembler() {
350 Isolate* isolate = Isolate::Current();
351 if (own_buffer_) { 351 if (own_buffer_) {
352 if (spare_buffer_ == NULL && buffer_size_ == kMinimalBufferSize) { 352 if (isolate->assembler_spare_buffer() == NULL &&
353 spare_buffer_ = buffer_; 353 buffer_size_ == kMinimalBufferSize) {
354 isolate->set_assembler_spare_buffer(buffer_);
354 } else { 355 } else {
355 DeleteArray(buffer_); 356 DeleteArray(buffer_);
356 } 357 }
357 } 358 }
358 } 359 }
359 360
360 361
361 void Assembler::GetCode(CodeDesc* desc) { 362 void Assembler::GetCode(CodeDesc* desc) {
362 // Finalize code (at this point overflow() may be true, but the gap ensures 363 // Finalize code (at this point overflow() may be true, but the gap ensures
363 // that we are still not overlapping instructions and relocation info). 364 // that we are still not overlapping instructions and relocation info).
364 ASSERT(pc_ <= reloc_info_writer.pos()); // No overlap. 365 ASSERT(pc_ <= reloc_info_writer.pos()); // No overlap.
365 // Setup code descriptor. 366 // Setup code descriptor.
366 desc->buffer = buffer_; 367 desc->buffer = buffer_;
367 desc->buffer_size = buffer_size_; 368 desc->buffer_size = buffer_size_;
368 desc->instr_size = pc_offset(); 369 desc->instr_size = pc_offset();
369 desc->reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos(); 370 desc->reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos();
370 desc->origin = this; 371 desc->origin = this;
371 372
372 Counters::reloc_info_size.Increment(desc->reloc_size); 373 COUNTERS->reloc_info_size()->Increment(desc->reloc_size);
373 } 374 }
374 375
375 376
376 void Assembler::Align(int m) { 377 void Assembler::Align(int m) {
377 ASSERT(IsPowerOf2(m)); 378 ASSERT(IsPowerOf2(m));
378 while ((pc_offset() & (m - 1)) != 0) { 379 while ((pc_offset() & (m - 1)) != 0) {
379 nop(); 380 nop();
380 } 381 }
381 } 382 }
382 383
383 384
384 void Assembler::CodeTargetAlign() { 385 void Assembler::CodeTargetAlign() {
385 Align(16); // Preferred alignment of jump targets on ia32. 386 Align(16); // Preferred alignment of jump targets on ia32.
386 } 387 }
387 388
388 389
389 void Assembler::cpuid() { 390 void Assembler::cpuid() {
390 ASSERT(CpuFeatures::IsEnabled(CPUID)); 391 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(CPUID));
391 EnsureSpace ensure_space(this); 392 EnsureSpace ensure_space(this);
392 last_pc_ = pc_; 393 last_pc_ = pc_;
393 EMIT(0x0F); 394 EMIT(0x0F);
394 EMIT(0xA2); 395 EMIT(0xA2);
395 } 396 }
396 397
397 398
398 void Assembler::pushad() { 399 void Assembler::pushad() {
399 EnsureSpace ensure_space(this); 400 EnsureSpace ensure_space(this);
400 last_pc_ = pc_; 401 last_pc_ = pc_;
(...skipping 340 matching lines...) Expand 10 before | Expand all | Expand 10 after
741 void Assembler::movzx_w(Register dst, const Operand& src) { 742 void Assembler::movzx_w(Register dst, const Operand& src) {
742 EnsureSpace ensure_space(this); 743 EnsureSpace ensure_space(this);
743 last_pc_ = pc_; 744 last_pc_ = pc_;
744 EMIT(0x0F); 745 EMIT(0x0F);
745 EMIT(0xB7); 746 EMIT(0xB7);
746 emit_operand(dst, src); 747 emit_operand(dst, src);
747 } 748 }
748 749
749 750
750 void Assembler::cmov(Condition cc, Register dst, int32_t imm32) { 751 void Assembler::cmov(Condition cc, Register dst, int32_t imm32) {
751 ASSERT(CpuFeatures::IsEnabled(CMOV)); 752 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(CMOV));
752 EnsureSpace ensure_space(this); 753 EnsureSpace ensure_space(this);
753 last_pc_ = pc_; 754 last_pc_ = pc_;
754 UNIMPLEMENTED(); 755 UNIMPLEMENTED();
755 USE(cc); 756 USE(cc);
756 USE(dst); 757 USE(dst);
757 USE(imm32); 758 USE(imm32);
758 } 759 }
759 760
760 761
761 void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) { 762 void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) {
762 ASSERT(CpuFeatures::IsEnabled(CMOV)); 763 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(CMOV));
763 EnsureSpace ensure_space(this); 764 EnsureSpace ensure_space(this);
764 last_pc_ = pc_; 765 last_pc_ = pc_;
765 UNIMPLEMENTED(); 766 UNIMPLEMENTED();
766 USE(cc); 767 USE(cc);
767 USE(dst); 768 USE(dst);
768 USE(handle); 769 USE(handle);
769 } 770 }
770 771
771 772
772 void Assembler::cmov(Condition cc, Register dst, const Operand& src) { 773 void Assembler::cmov(Condition cc, Register dst, const Operand& src) {
773 ASSERT(CpuFeatures::IsEnabled(CMOV)); 774 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(CMOV));
774 EnsureSpace ensure_space(this); 775 EnsureSpace ensure_space(this);
775 last_pc_ = pc_; 776 last_pc_ = pc_;
776 // Opcode: 0f 40 + cc /r. 777 // Opcode: 0f 40 + cc /r.
777 EMIT(0x0F); 778 EMIT(0x0F);
778 EMIT(0x40 + cc); 779 EMIT(0x40 + cc);
779 emit_operand(dst, src); 780 emit_operand(dst, src);
780 } 781 }
781 782
782 783
783 void Assembler::cld() { 784 void Assembler::cld() {
(...skipping 660 matching lines...) Expand 10 before | Expand all | Expand 10 after
1444 1445
1445 1446
1446 void Assembler::nop() { 1447 void Assembler::nop() {
1447 EnsureSpace ensure_space(this); 1448 EnsureSpace ensure_space(this);
1448 last_pc_ = pc_; 1449 last_pc_ = pc_;
1449 EMIT(0x90); 1450 EMIT(0x90);
1450 } 1451 }
1451 1452
1452 1453
1453 void Assembler::rdtsc() { 1454 void Assembler::rdtsc() {
1454 ASSERT(CpuFeatures::IsEnabled(RDTSC)); 1455 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(RDTSC));
1455 EnsureSpace ensure_space(this); 1456 EnsureSpace ensure_space(this);
1456 last_pc_ = pc_; 1457 last_pc_ = pc_;
1457 EMIT(0x0F); 1458 EMIT(0x0F);
1458 EMIT(0x31); 1459 EMIT(0x31);
1459 } 1460 }
1460 1461
1461 1462
1462 void Assembler::ret(int imm16) { 1463 void Assembler::ret(int imm16) {
1463 EnsureSpace ensure_space(this); 1464 EnsureSpace ensure_space(this);
1464 last_pc_ = pc_; 1465 last_pc_ = pc_;
(...skipping 385 matching lines...) Expand 10 before | Expand all | Expand 10 after
1850 1851
1851 void Assembler::fistp_s(const Operand& adr) { 1852 void Assembler::fistp_s(const Operand& adr) {
1852 EnsureSpace ensure_space(this); 1853 EnsureSpace ensure_space(this);
1853 last_pc_ = pc_; 1854 last_pc_ = pc_;
1854 EMIT(0xDB); 1855 EMIT(0xDB);
1855 emit_operand(ebx, adr); 1856 emit_operand(ebx, adr);
1856 } 1857 }
1857 1858
1858 1859
1859 void Assembler::fisttp_s(const Operand& adr) { 1860 void Assembler::fisttp_s(const Operand& adr) {
1860 ASSERT(CpuFeatures::IsEnabled(SSE3)); 1861 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE3));
1861 EnsureSpace ensure_space(this); 1862 EnsureSpace ensure_space(this);
1862 last_pc_ = pc_; 1863 last_pc_ = pc_;
1863 EMIT(0xDB); 1864 EMIT(0xDB);
1864 emit_operand(ecx, adr); 1865 emit_operand(ecx, adr);
1865 } 1866 }
1866 1867
1867 1868
1868 void Assembler::fisttp_d(const Operand& adr) { 1869 void Assembler::fisttp_d(const Operand& adr) {
1869 ASSERT(CpuFeatures::IsEnabled(SSE3)); 1870 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE3));
1870 EnsureSpace ensure_space(this); 1871 EnsureSpace ensure_space(this);
1871 last_pc_ = pc_; 1872 last_pc_ = pc_;
1872 EMIT(0xDD); 1873 EMIT(0xDD);
1873 emit_operand(ecx, adr); 1874 emit_operand(ecx, adr);
1874 } 1875 }
1875 1876
1876 1877
1877 void Assembler::fist_s(const Operand& adr) { 1878 void Assembler::fist_s(const Operand& adr) {
1878 EnsureSpace ensure_space(this); 1879 EnsureSpace ensure_space(this);
1879 last_pc_ = pc_; 1880 last_pc_ = pc_;
(...skipping 248 matching lines...) Expand 10 before | Expand all | Expand 10 after
2128 ASSERT(reg.is_byte_register()); 2129 ASSERT(reg.is_byte_register());
2129 EnsureSpace ensure_space(this); 2130 EnsureSpace ensure_space(this);
2130 last_pc_ = pc_; 2131 last_pc_ = pc_;
2131 EMIT(0x0F); 2132 EMIT(0x0F);
2132 EMIT(0x90 | cc); 2133 EMIT(0x90 | cc);
2133 EMIT(0xC0 | reg.code()); 2134 EMIT(0xC0 | reg.code());
2134 } 2135 }
2135 2136
2136 2137
2137 void Assembler::cvttss2si(Register dst, const Operand& src) { 2138 void Assembler::cvttss2si(Register dst, const Operand& src) {
2138 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2139 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2139 EnsureSpace ensure_space(this); 2140 EnsureSpace ensure_space(this);
2140 last_pc_ = pc_; 2141 last_pc_ = pc_;
2141 EMIT(0xF3); 2142 EMIT(0xF3);
2142 EMIT(0x0F); 2143 EMIT(0x0F);
2143 EMIT(0x2C); 2144 EMIT(0x2C);
2144 emit_operand(dst, src); 2145 emit_operand(dst, src);
2145 } 2146 }
2146 2147
2147 2148
2148 void Assembler::cvttsd2si(Register dst, const Operand& src) { 2149 void Assembler::cvttsd2si(Register dst, const Operand& src) {
2149 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2150 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2150 EnsureSpace ensure_space(this); 2151 EnsureSpace ensure_space(this);
2151 last_pc_ = pc_; 2152 last_pc_ = pc_;
2152 EMIT(0xF2); 2153 EMIT(0xF2);
2153 EMIT(0x0F); 2154 EMIT(0x0F);
2154 EMIT(0x2C); 2155 EMIT(0x2C);
2155 emit_operand(dst, src); 2156 emit_operand(dst, src);
2156 } 2157 }
2157 2158
2158 2159
2159 void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) { 2160 void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) {
2160 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2161 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2161 EnsureSpace ensure_space(this); 2162 EnsureSpace ensure_space(this);
2162 last_pc_ = pc_; 2163 last_pc_ = pc_;
2163 EMIT(0xF2); 2164 EMIT(0xF2);
2164 EMIT(0x0F); 2165 EMIT(0x0F);
2165 EMIT(0x2A); 2166 EMIT(0x2A);
2166 emit_sse_operand(dst, src); 2167 emit_sse_operand(dst, src);
2167 } 2168 }
2168 2169
2169 2170
2170 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) { 2171 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
2171 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2172 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2172 EnsureSpace ensure_space(this); 2173 EnsureSpace ensure_space(this);
2173 last_pc_ = pc_; 2174 last_pc_ = pc_;
2174 EMIT(0xF3); 2175 EMIT(0xF3);
2175 EMIT(0x0F); 2176 EMIT(0x0F);
2176 EMIT(0x5A); 2177 EMIT(0x5A);
2177 emit_sse_operand(dst, src); 2178 emit_sse_operand(dst, src);
2178 } 2179 }
2179 2180
2180 2181
2181 void Assembler::addsd(XMMRegister dst, XMMRegister src) { 2182 void Assembler::addsd(XMMRegister dst, XMMRegister src) {
2182 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2183 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2183 EnsureSpace ensure_space(this); 2184 EnsureSpace ensure_space(this);
2184 last_pc_ = pc_; 2185 last_pc_ = pc_;
2185 EMIT(0xF2); 2186 EMIT(0xF2);
2186 EMIT(0x0F); 2187 EMIT(0x0F);
2187 EMIT(0x58); 2188 EMIT(0x58);
2188 emit_sse_operand(dst, src); 2189 emit_sse_operand(dst, src);
2189 } 2190 }
2190 2191
2191 2192
2192 void Assembler::mulsd(XMMRegister dst, XMMRegister src) { 2193 void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
2193 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2194 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2194 EnsureSpace ensure_space(this); 2195 EnsureSpace ensure_space(this);
2195 last_pc_ = pc_; 2196 last_pc_ = pc_;
2196 EMIT(0xF2); 2197 EMIT(0xF2);
2197 EMIT(0x0F); 2198 EMIT(0x0F);
2198 EMIT(0x59); 2199 EMIT(0x59);
2199 emit_sse_operand(dst, src); 2200 emit_sse_operand(dst, src);
2200 } 2201 }
2201 2202
2202 2203
2203 void Assembler::subsd(XMMRegister dst, XMMRegister src) { 2204 void Assembler::subsd(XMMRegister dst, XMMRegister src) {
2204 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2205 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2205 EnsureSpace ensure_space(this); 2206 EnsureSpace ensure_space(this);
2206 last_pc_ = pc_; 2207 last_pc_ = pc_;
2207 EMIT(0xF2); 2208 EMIT(0xF2);
2208 EMIT(0x0F); 2209 EMIT(0x0F);
2209 EMIT(0x5C); 2210 EMIT(0x5C);
2210 emit_sse_operand(dst, src); 2211 emit_sse_operand(dst, src);
2211 } 2212 }
2212 2213
2213 2214
2214 void Assembler::divsd(XMMRegister dst, XMMRegister src) { 2215 void Assembler::divsd(XMMRegister dst, XMMRegister src) {
2215 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2216 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2216 EnsureSpace ensure_space(this); 2217 EnsureSpace ensure_space(this);
2217 last_pc_ = pc_; 2218 last_pc_ = pc_;
2218 EMIT(0xF2); 2219 EMIT(0xF2);
2219 EMIT(0x0F); 2220 EMIT(0x0F);
2220 EMIT(0x5E); 2221 EMIT(0x5E);
2221 emit_sse_operand(dst, src); 2222 emit_sse_operand(dst, src);
2222 } 2223 }
2223 2224
2224 2225
2225 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { 2226 void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
2226 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2227 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2227 EnsureSpace ensure_space(this); 2228 EnsureSpace ensure_space(this);
2228 last_pc_ = pc_; 2229 last_pc_ = pc_;
2229 EMIT(0x66); 2230 EMIT(0x66);
2230 EMIT(0x0F); 2231 EMIT(0x0F);
2231 EMIT(0x57); 2232 EMIT(0x57);
2232 emit_sse_operand(dst, src); 2233 emit_sse_operand(dst, src);
2233 } 2234 }
2234 2235
2235 2236
2236 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { 2237 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
(...skipping 10 matching lines...) Expand all
2247 EnsureSpace ensure_space(this); 2248 EnsureSpace ensure_space(this);
2248 last_pc_ = pc_; 2249 last_pc_ = pc_;
2249 EMIT(0x66); 2250 EMIT(0x66);
2250 EMIT(0x0F); 2251 EMIT(0x0F);
2251 EMIT(0x54); 2252 EMIT(0x54);
2252 emit_sse_operand(dst, src); 2253 emit_sse_operand(dst, src);
2253 } 2254 }
2254 2255
2255 2256
2256 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { 2257 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
2257 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2258 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2258 EnsureSpace ensure_space(this); 2259 EnsureSpace ensure_space(this);
2259 last_pc_ = pc_; 2260 last_pc_ = pc_;
2260 EMIT(0x66); 2261 EMIT(0x66);
2261 EMIT(0x0F); 2262 EMIT(0x0F);
2262 EMIT(0x2E); 2263 EMIT(0x2E);
2263 emit_sse_operand(dst, src); 2264 emit_sse_operand(dst, src);
2264 } 2265 }
2265 2266
2266 2267
2267 void Assembler::movmskpd(Register dst, XMMRegister src) { 2268 void Assembler::movmskpd(Register dst, XMMRegister src) {
2268 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2269 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2269 EnsureSpace ensure_space(this); 2270 EnsureSpace ensure_space(this);
2270 last_pc_ = pc_; 2271 last_pc_ = pc_;
2271 EMIT(0x66); 2272 EMIT(0x66);
2272 EMIT(0x0F); 2273 EMIT(0x0F);
2273 EMIT(0x50); 2274 EMIT(0x50);
2274 emit_sse_operand(dst, src); 2275 emit_sse_operand(dst, src);
2275 } 2276 }
2276 2277
2277 2278
2278 void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) { 2279 void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) {
2279 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2280 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2280 EnsureSpace ensure_space(this); 2281 EnsureSpace ensure_space(this);
2281 last_pc_ = pc_; 2282 last_pc_ = pc_;
2282 EMIT(0xF2); 2283 EMIT(0xF2);
2283 EMIT(0x0F); 2284 EMIT(0x0F);
2284 EMIT(0xC2); 2285 EMIT(0xC2);
2285 emit_sse_operand(dst, src); 2286 emit_sse_operand(dst, src);
2286 EMIT(1); // LT == 1 2287 EMIT(1); // LT == 1
2287 } 2288 }
2288 2289
2289 2290
2290 void Assembler::movaps(XMMRegister dst, XMMRegister src) { 2291 void Assembler::movaps(XMMRegister dst, XMMRegister src) {
2291 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2292 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2292 EnsureSpace ensure_space(this); 2293 EnsureSpace ensure_space(this);
2293 last_pc_ = pc_; 2294 last_pc_ = pc_;
2294 EMIT(0x0F); 2295 EMIT(0x0F);
2295 EMIT(0x28); 2296 EMIT(0x28);
2296 emit_sse_operand(dst, src); 2297 emit_sse_operand(dst, src);
2297 } 2298 }
2298 2299
2299 2300
2300 void Assembler::movdqa(const Operand& dst, XMMRegister src) { 2301 void Assembler::movdqa(const Operand& dst, XMMRegister src) {
2301 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2302 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2302 EnsureSpace ensure_space(this); 2303 EnsureSpace ensure_space(this);
2303 last_pc_ = pc_; 2304 last_pc_ = pc_;
2304 EMIT(0x66); 2305 EMIT(0x66);
2305 EMIT(0x0F); 2306 EMIT(0x0F);
2306 EMIT(0x7F); 2307 EMIT(0x7F);
2307 emit_sse_operand(src, dst); 2308 emit_sse_operand(src, dst);
2308 } 2309 }
2309 2310
2310 2311
2311 void Assembler::movdqa(XMMRegister dst, const Operand& src) { 2312 void Assembler::movdqa(XMMRegister dst, const Operand& src) {
2312 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2313 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2313 EnsureSpace ensure_space(this); 2314 EnsureSpace ensure_space(this);
2314 last_pc_ = pc_; 2315 last_pc_ = pc_;
2315 EMIT(0x66); 2316 EMIT(0x66);
2316 EMIT(0x0F); 2317 EMIT(0x0F);
2317 EMIT(0x6F); 2318 EMIT(0x6F);
2318 emit_sse_operand(dst, src); 2319 emit_sse_operand(dst, src);
2319 } 2320 }
2320 2321
2321 2322
2322 void Assembler::movdqu(const Operand& dst, XMMRegister src ) { 2323 void Assembler::movdqu(const Operand& dst, XMMRegister src ) {
2323 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2324 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2324 EnsureSpace ensure_space(this); 2325 EnsureSpace ensure_space(this);
2325 last_pc_ = pc_; 2326 last_pc_ = pc_;
2326 EMIT(0xF3); 2327 EMIT(0xF3);
2327 EMIT(0x0F); 2328 EMIT(0x0F);
2328 EMIT(0x7F); 2329 EMIT(0x7F);
2329 emit_sse_operand(src, dst); 2330 emit_sse_operand(src, dst);
2330 } 2331 }
2331 2332
2332 2333
2333 void Assembler::movdqu(XMMRegister dst, const Operand& src) { 2334 void Assembler::movdqu(XMMRegister dst, const Operand& src) {
2334 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2335 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2335 EnsureSpace ensure_space(this); 2336 EnsureSpace ensure_space(this);
2336 last_pc_ = pc_; 2337 last_pc_ = pc_;
2337 EMIT(0xF3); 2338 EMIT(0xF3);
2338 EMIT(0x0F); 2339 EMIT(0x0F);
2339 EMIT(0x6F); 2340 EMIT(0x6F);
2340 emit_sse_operand(dst, src); 2341 emit_sse_operand(dst, src);
2341 } 2342 }
2342 2343
2343 2344
2344 void Assembler::movntdqa(XMMRegister dst, const Operand& src) { 2345 void Assembler::movntdqa(XMMRegister dst, const Operand& src) {
2345 ASSERT(CpuFeatures::IsEnabled(SSE4_1)); 2346 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1));
2346 EnsureSpace ensure_space(this); 2347 EnsureSpace ensure_space(this);
2347 last_pc_ = pc_; 2348 last_pc_ = pc_;
2348 EMIT(0x66); 2349 EMIT(0x66);
2349 EMIT(0x0F); 2350 EMIT(0x0F);
2350 EMIT(0x38); 2351 EMIT(0x38);
2351 EMIT(0x2A); 2352 EMIT(0x2A);
2352 emit_sse_operand(dst, src); 2353 emit_sse_operand(dst, src);
2353 } 2354 }
2354 2355
2355 2356
2356 void Assembler::movntdq(const Operand& dst, XMMRegister src) { 2357 void Assembler::movntdq(const Operand& dst, XMMRegister src) {
2357 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2358 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2358 EnsureSpace ensure_space(this); 2359 EnsureSpace ensure_space(this);
2359 last_pc_ = pc_; 2360 last_pc_ = pc_;
2360 EMIT(0x66); 2361 EMIT(0x66);
2361 EMIT(0x0F); 2362 EMIT(0x0F);
2362 EMIT(0xE7); 2363 EMIT(0xE7);
2363 emit_sse_operand(src, dst); 2364 emit_sse_operand(src, dst);
2364 } 2365 }
2365 2366
2366 2367
2367 void Assembler::prefetch(const Operand& src, int level) { 2368 void Assembler::prefetch(const Operand& src, int level) {
(...skipping 15 matching lines...) Expand all
2383 2384
2384 2385
2385 void Assembler::movdbl(const Operand& dst, XMMRegister src) { 2386 void Assembler::movdbl(const Operand& dst, XMMRegister src) {
2386 EnsureSpace ensure_space(this); 2387 EnsureSpace ensure_space(this);
2387 last_pc_ = pc_; 2388 last_pc_ = pc_;
2388 movsd(dst, src); 2389 movsd(dst, src);
2389 } 2390 }
2390 2391
2391 2392
2392 void Assembler::movsd(const Operand& dst, XMMRegister src ) { 2393 void Assembler::movsd(const Operand& dst, XMMRegister src ) {
2393 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2394 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2394 EnsureSpace ensure_space(this); 2395 EnsureSpace ensure_space(this);
2395 last_pc_ = pc_; 2396 last_pc_ = pc_;
2396 EMIT(0xF2); // double 2397 EMIT(0xF2); // double
2397 EMIT(0x0F); 2398 EMIT(0x0F);
2398 EMIT(0x11); // store 2399 EMIT(0x11); // store
2399 emit_sse_operand(src, dst); 2400 emit_sse_operand(src, dst);
2400 } 2401 }
2401 2402
2402 2403
2403 void Assembler::movsd(XMMRegister dst, const Operand& src) { 2404 void Assembler::movsd(XMMRegister dst, const Operand& src) {
2404 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2405 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2405 EnsureSpace ensure_space(this); 2406 EnsureSpace ensure_space(this);
2406 last_pc_ = pc_; 2407 last_pc_ = pc_;
2407 EMIT(0xF2); // double 2408 EMIT(0xF2); // double
2408 EMIT(0x0F); 2409 EMIT(0x0F);
2409 EMIT(0x10); // load 2410 EMIT(0x10); // load
2410 emit_sse_operand(dst, src); 2411 emit_sse_operand(dst, src);
2411 } 2412 }
2412 2413
2413 2414
2414 void Assembler::movsd(XMMRegister dst, XMMRegister src) { 2415 void Assembler::movsd(XMMRegister dst, XMMRegister src) {
2415 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2416 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2416 EnsureSpace ensure_space(this); 2417 EnsureSpace ensure_space(this);
2417 last_pc_ = pc_; 2418 last_pc_ = pc_;
2418 EMIT(0xF2); 2419 EMIT(0xF2);
2419 EMIT(0x0F); 2420 EMIT(0x0F);
2420 EMIT(0x10); 2421 EMIT(0x10);
2421 emit_sse_operand(dst, src); 2422 emit_sse_operand(dst, src);
2422 } 2423 }
2423 2424
2424 2425
2425 void Assembler::movd(XMMRegister dst, const Operand& src) { 2426 void Assembler::movd(XMMRegister dst, const Operand& src) {
2426 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2427 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2427 EnsureSpace ensure_space(this); 2428 EnsureSpace ensure_space(this);
2428 last_pc_ = pc_; 2429 last_pc_ = pc_;
2429 EMIT(0x66); 2430 EMIT(0x66);
2430 EMIT(0x0F); 2431 EMIT(0x0F);
2431 EMIT(0x6E); 2432 EMIT(0x6E);
2432 emit_sse_operand(dst, src); 2433 emit_sse_operand(dst, src);
2433 } 2434 }
2434 2435
2435 2436
2436 void Assembler::movd(const Operand& dst, XMMRegister src) { 2437 void Assembler::movd(const Operand& dst, XMMRegister src) {
2437 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2438 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2438 EnsureSpace ensure_space(this); 2439 EnsureSpace ensure_space(this);
2439 last_pc_ = pc_; 2440 last_pc_ = pc_;
2440 EMIT(0x66); 2441 EMIT(0x66);
2441 EMIT(0x0F); 2442 EMIT(0x0F);
2442 EMIT(0x7E); 2443 EMIT(0x7E);
2443 emit_sse_operand(src, dst); 2444 emit_sse_operand(src, dst);
2444 } 2445 }
2445 2446
2446 2447
2447 void Assembler::pand(XMMRegister dst, XMMRegister src) { 2448 void Assembler::pand(XMMRegister dst, XMMRegister src) {
2448 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2449 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2449 EnsureSpace ensure_space(this); 2450 EnsureSpace ensure_space(this);
2450 last_pc_ = pc_; 2451 last_pc_ = pc_;
2451 EMIT(0x66); 2452 EMIT(0x66);
2452 EMIT(0x0F); 2453 EMIT(0x0F);
2453 EMIT(0xDB); 2454 EMIT(0xDB);
2454 emit_sse_operand(dst, src); 2455 emit_sse_operand(dst, src);
2455 } 2456 }
2456 2457
2457 2458
2458 void Assembler::pxor(XMMRegister dst, XMMRegister src) { 2459 void Assembler::pxor(XMMRegister dst, XMMRegister src) {
2459 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2460 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2460 EnsureSpace ensure_space(this); 2461 EnsureSpace ensure_space(this);
2461 last_pc_ = pc_; 2462 last_pc_ = pc_;
2462 EMIT(0x66); 2463 EMIT(0x66);
2463 EMIT(0x0F); 2464 EMIT(0x0F);
2464 EMIT(0xEF); 2465 EMIT(0xEF);
2465 emit_sse_operand(dst, src); 2466 emit_sse_operand(dst, src);
2466 } 2467 }
2467 2468
2468 2469
2469 void Assembler::por(XMMRegister dst, XMMRegister src) { 2470 void Assembler::por(XMMRegister dst, XMMRegister src) {
2470 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2471 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2471 EnsureSpace ensure_space(this); 2472 EnsureSpace ensure_space(this);
2472 last_pc_ = pc_; 2473 last_pc_ = pc_;
2473 EMIT(0x66); 2474 EMIT(0x66);
2474 EMIT(0x0F); 2475 EMIT(0x0F);
2475 EMIT(0xEB); 2476 EMIT(0xEB);
2476 emit_sse_operand(dst, src); 2477 emit_sse_operand(dst, src);
2477 } 2478 }
2478 2479
2479 2480
2480 void Assembler::ptest(XMMRegister dst, XMMRegister src) { 2481 void Assembler::ptest(XMMRegister dst, XMMRegister src) {
2481 ASSERT(CpuFeatures::IsEnabled(SSE4_1)); 2482 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1));
2482 EnsureSpace ensure_space(this); 2483 EnsureSpace ensure_space(this);
2483 last_pc_ = pc_; 2484 last_pc_ = pc_;
2484 EMIT(0x66); 2485 EMIT(0x66);
2485 EMIT(0x0F); 2486 EMIT(0x0F);
2486 EMIT(0x38); 2487 EMIT(0x38);
2487 EMIT(0x17); 2488 EMIT(0x17);
2488 emit_sse_operand(dst, src); 2489 emit_sse_operand(dst, src);
2489 } 2490 }
2490 2491
2491 2492
2492 void Assembler::psllq(XMMRegister reg, int8_t shift) { 2493 void Assembler::psllq(XMMRegister reg, int8_t shift) {
2493 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2494 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2494 EnsureSpace ensure_space(this); 2495 EnsureSpace ensure_space(this);
2495 last_pc_ = pc_; 2496 last_pc_ = pc_;
2496 EMIT(0x66); 2497 EMIT(0x66);
2497 EMIT(0x0F); 2498 EMIT(0x0F);
2498 EMIT(0x73); 2499 EMIT(0x73);
2499 emit_sse_operand(esi, reg); // esi == 6 2500 emit_sse_operand(esi, reg); // esi == 6
2500 EMIT(shift); 2501 EMIT(shift);
2501 } 2502 }
2502 2503
2503 2504
2504 void Assembler::psllq(XMMRegister dst, XMMRegister src) { 2505 void Assembler::psllq(XMMRegister dst, XMMRegister src) {
2505 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2506 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2506 EnsureSpace ensure_space(this); 2507 EnsureSpace ensure_space(this);
2507 last_pc_ = pc_; 2508 last_pc_ = pc_;
2508 EMIT(0x66); 2509 EMIT(0x66);
2509 EMIT(0x0F); 2510 EMIT(0x0F);
2510 EMIT(0xF3); 2511 EMIT(0xF3);
2511 emit_sse_operand(dst, src); 2512 emit_sse_operand(dst, src);
2512 } 2513 }
2513 2514
2514 2515
2515 void Assembler::psrlq(XMMRegister reg, int8_t shift) { 2516 void Assembler::psrlq(XMMRegister reg, int8_t shift) {
2516 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2517 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2517 EnsureSpace ensure_space(this); 2518 EnsureSpace ensure_space(this);
2518 last_pc_ = pc_; 2519 last_pc_ = pc_;
2519 EMIT(0x66); 2520 EMIT(0x66);
2520 EMIT(0x0F); 2521 EMIT(0x0F);
2521 EMIT(0x73); 2522 EMIT(0x73);
2522 emit_sse_operand(edx, reg); // edx == 2 2523 emit_sse_operand(edx, reg); // edx == 2
2523 EMIT(shift); 2524 EMIT(shift);
2524 } 2525 }
2525 2526
2526 2527
2527 void Assembler::psrlq(XMMRegister dst, XMMRegister src) { 2528 void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
2528 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2529 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2529 EnsureSpace ensure_space(this); 2530 EnsureSpace ensure_space(this);
2530 last_pc_ = pc_; 2531 last_pc_ = pc_;
2531 EMIT(0x66); 2532 EMIT(0x66);
2532 EMIT(0x0F); 2533 EMIT(0x0F);
2533 EMIT(0xD3); 2534 EMIT(0xD3);
2534 emit_sse_operand(dst, src); 2535 emit_sse_operand(dst, src);
2535 } 2536 }
2536 2537
2537 2538
2538 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) { 2539 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) {
2539 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2540 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
2540 EnsureSpace ensure_space(this); 2541 EnsureSpace ensure_space(this);
2541 last_pc_ = pc_; 2542 last_pc_ = pc_;
2542 EMIT(0x66); 2543 EMIT(0x66);
2543 EMIT(0x0F); 2544 EMIT(0x0F);
2544 EMIT(0x70); 2545 EMIT(0x70);
2545 emit_sse_operand(dst, src); 2546 emit_sse_operand(dst, src);
2546 EMIT(shuffle); 2547 EMIT(shuffle);
2547 } 2548 }
2548 2549
2549 2550
2550 void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) { 2551 void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) {
2551 ASSERT(CpuFeatures::IsEnabled(SSE4_1)); 2552 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1));
2552 EnsureSpace ensure_space(this); 2553 EnsureSpace ensure_space(this);
2553 last_pc_ = pc_; 2554 last_pc_ = pc_;
2554 EMIT(0x66); 2555 EMIT(0x66);
2555 EMIT(0x0F); 2556 EMIT(0x0F);
2556 EMIT(0x3A); 2557 EMIT(0x3A);
2557 EMIT(0x16); 2558 EMIT(0x16);
2558 emit_sse_operand(src, dst); 2559 emit_sse_operand(src, dst);
2559 EMIT(offset); 2560 EMIT(offset);
2560 } 2561 }
2561 2562
2562 2563
2563 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) { 2564 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) {
2564 ASSERT(CpuFeatures::IsEnabled(SSE4_1)); 2565 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1));
2565 EnsureSpace ensure_space(this); 2566 EnsureSpace ensure_space(this);
2566 last_pc_ = pc_; 2567 last_pc_ = pc_;
2567 EMIT(0x66); 2568 EMIT(0x66);
2568 EMIT(0x0F); 2569 EMIT(0x0F);
2569 EMIT(0x3A); 2570 EMIT(0x3A);
2570 EMIT(0x22); 2571 EMIT(0x22);
2571 emit_sse_operand(dst, src); 2572 emit_sse_operand(dst, src);
2572 EMIT(offset); 2573 EMIT(offset);
2573 } 2574 }
2574 2575
(...skipping 35 matching lines...) Expand 10 before | Expand all | Expand 10 after
2610 2611
2611 void Assembler::RecordComment(const char* msg, bool force) { 2612 void Assembler::RecordComment(const char* msg, bool force) {
2612 if (FLAG_code_comments || force) { 2613 if (FLAG_code_comments || force) {
2613 EnsureSpace ensure_space(this); 2614 EnsureSpace ensure_space(this);
2614 RecordRelocInfo(RelocInfo::COMMENT, reinterpret_cast<intptr_t>(msg)); 2615 RecordRelocInfo(RelocInfo::COMMENT, reinterpret_cast<intptr_t>(msg));
2615 } 2616 }
2616 } 2617 }
2617 2618
2618 2619
2619 void Assembler::GrowBuffer() { 2620 void Assembler::GrowBuffer() {
2621 Isolate* isolate = Isolate::Current();
2620 ASSERT(overflow()); 2622 ASSERT(overflow());
2621 if (!own_buffer_) FATAL("external code buffer is too small"); 2623 if (!own_buffer_) FATAL("external code buffer is too small");
2622 2624
2623 // Compute new buffer size. 2625 // Compute new buffer size.
2624 CodeDesc desc; // the new buffer 2626 CodeDesc desc; // the new buffer
2625 if (buffer_size_ < 4*KB) { 2627 if (buffer_size_ < 4*KB) {
2626 desc.buffer_size = 4*KB; 2628 desc.buffer_size = 4*KB;
2627 } else { 2629 } else {
2628 desc.buffer_size = 2*buffer_size_; 2630 desc.buffer_size = 2*buffer_size_;
2629 } 2631 }
2630 // Some internal data structures overflow for very large buffers, 2632 // Some internal data structures overflow for very large buffers,
2631 // they must ensure that kMaximalBufferSize is not too large. 2633 // they must ensure that kMaximalBufferSize is not too large.
2632 if ((desc.buffer_size > kMaximalBufferSize) || 2634 if ((desc.buffer_size > kMaximalBufferSize) ||
2633 (desc.buffer_size > Heap::MaxOldGenerationSize())) { 2635 (desc.buffer_size > HEAP->MaxOldGenerationSize())) {
2634 V8::FatalProcessOutOfMemory("Assembler::GrowBuffer"); 2636 V8::FatalProcessOutOfMemory("Assembler::GrowBuffer");
2635 } 2637 }
2636 2638
2637 // Setup new buffer. 2639 // Setup new buffer.
2638 desc.buffer = NewArray<byte>(desc.buffer_size); 2640 desc.buffer = NewArray<byte>(desc.buffer_size);
2639 desc.instr_size = pc_offset(); 2641 desc.instr_size = pc_offset();
2640 desc.reloc_size = (buffer_ + buffer_size_) - (reloc_info_writer.pos()); 2642 desc.reloc_size = (buffer_ + buffer_size_) - (reloc_info_writer.pos());
2641 2643
2642 // Clear the buffer in debug mode. Use 'int3' instructions to make 2644 // Clear the buffer in debug mode. Use 'int3' instructions to make
2643 // sure to get into problems if we ever run uninitialized code. 2645 // sure to get into problems if we ever run uninitialized code.
2644 #ifdef DEBUG 2646 #ifdef DEBUG
2645 memset(desc.buffer, 0xCC, desc.buffer_size); 2647 memset(desc.buffer, 0xCC, desc.buffer_size);
2646 #endif 2648 #endif
2647 2649
2648 // Copy the data. 2650 // Copy the data.
2649 int pc_delta = desc.buffer - buffer_; 2651 int pc_delta = desc.buffer - buffer_;
2650 int rc_delta = (desc.buffer + desc.buffer_size) - (buffer_ + buffer_size_); 2652 int rc_delta = (desc.buffer + desc.buffer_size) - (buffer_ + buffer_size_);
2651 memmove(desc.buffer, buffer_, desc.instr_size); 2653 memmove(desc.buffer, buffer_, desc.instr_size);
2652 memmove(rc_delta + reloc_info_writer.pos(), 2654 memmove(rc_delta + reloc_info_writer.pos(),
2653 reloc_info_writer.pos(), desc.reloc_size); 2655 reloc_info_writer.pos(), desc.reloc_size);
2654 2656
2655 // Switch buffers. 2657 // Switch buffers.
2656 if (spare_buffer_ == NULL && buffer_size_ == kMinimalBufferSize) { 2658 if (isolate->assembler_spare_buffer() == NULL &&
2657 spare_buffer_ = buffer_; 2659 buffer_size_ == kMinimalBufferSize) {
2660 isolate->set_assembler_spare_buffer(buffer_);
2658 } else { 2661 } else {
2659 DeleteArray(buffer_); 2662 DeleteArray(buffer_);
2660 } 2663 }
2661 buffer_ = desc.buffer; 2664 buffer_ = desc.buffer;
2662 buffer_size_ = desc.buffer_size; 2665 buffer_size_ = desc.buffer_size;
2663 pc_ += pc_delta; 2666 pc_ += pc_delta;
2664 if (last_pc_ != NULL) { 2667 if (last_pc_ != NULL) {
2665 last_pc_ += pc_delta; 2668 last_pc_ += pc_delta;
2666 } 2669 }
2667 reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta, 2670 reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta,
(...skipping 124 matching lines...) Expand 10 before | Expand all | Expand 10 after
2792 fprintf(coverage_log, "%s\n", file_line); 2795 fprintf(coverage_log, "%s\n", file_line);
2793 fflush(coverage_log); 2796 fflush(coverage_log);
2794 } 2797 }
2795 } 2798 }
2796 2799
2797 #endif 2800 #endif
2798 2801
2799 } } // namespace v8::internal 2802 } } // namespace v8::internal
2800 2803
2801 #endif // V8_TARGET_ARCH_IA32 2804 #endif // V8_TARGET_ARCH_IA32
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