Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(122)

Side by Side Diff: src/arm/codegen-arm.cc

Issue 6677075: Fixed incorrect assumption about BIT_AND on smis on ARM. (Closed) Base URL: http://v8.googlecode.com/svn/branches/3.0/
Patch Set: Created 9 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « no previous file | src/version.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 1135 matching lines...) Expand 10 before | Expand all | Expand 10 after
1146 case Token::SHL: 1146 case Token::SHL:
1147 ASSERT(!reversed_); 1147 ASSERT(!reversed_);
1148 if (shift_value != 0) { 1148 if (shift_value != 0) {
1149 __ mov(int32, Operand(int32, LSL, shift_value)); 1149 __ mov(int32, Operand(int32, LSL, shift_value));
1150 } 1150 }
1151 break; 1151 break;
1152 default: UNREACHABLE(); 1152 default: UNREACHABLE();
1153 } 1153 }
1154 // Check that the *signed* result fits in a smi. Not necessary for AND, SAR 1154 // Check that the *signed* result fits in a smi. Not necessary for AND, SAR
1155 // if the shift if more than 0 or SHR if the shit is more than 1. 1155 // if the shift if more than 0 or SHR if the shit is more than 1.
1156 if (!( (op_ == Token::AND) || 1156 if (!( (op_ == Token::AND && value_ >= 0) ||
1157 ((op_ == Token::SAR) && (shift_value > 0)) || 1157 ((op_ == Token::SAR) && (shift_value > 0)) ||
1158 ((op_ == Token::SHR) && (shift_value > 1)))) { 1158 ((op_ == Token::SHR) && (shift_value > 1)))) {
1159 __ add(r3, int32, Operand(0x40000000), SetCC); 1159 __ add(r3, int32, Operand(0x40000000), SetCC);
1160 __ b(mi, &result_not_a_smi); 1160 __ b(mi, &result_not_a_smi);
1161 } 1161 }
1162 __ mov(tos_register_, Operand(int32, LSL, kSmiTagSize)); 1162 __ mov(tos_register_, Operand(int32, LSL, kSmiTagSize));
1163 Exit(); 1163 Exit();
1164 1164
1165 if (result_not_a_smi.is_linked()) { 1165 if (result_not_a_smi.is_linked()) {
1166 __ bind(&result_not_a_smi); 1166 __ bind(&result_not_a_smi);
(...skipping 240 matching lines...) Expand 10 before | Expand all | Expand 10 after
1407 new DeferredInlineSmiOperation(op, int_value, reversed, mode, tos); 1407 new DeferredInlineSmiOperation(op, int_value, reversed, mode, tos);
1408 __ tst(tos, Operand(kSmiTagMask)); 1408 __ tst(tos, Operand(kSmiTagMask));
1409 deferred->JumpToNonSmiInput(ne); 1409 deferred->JumpToNonSmiInput(ne);
1410 switch (op) { 1410 switch (op) {
1411 case Token::BIT_OR: __ orr(tos, tos, Operand(value)); break; 1411 case Token::BIT_OR: __ orr(tos, tos, Operand(value)); break;
1412 case Token::BIT_XOR: __ eor(tos, tos, Operand(value)); break; 1412 case Token::BIT_XOR: __ eor(tos, tos, Operand(value)); break;
1413 case Token::BIT_AND: __ And(tos, tos, Operand(value)); break; 1413 case Token::BIT_AND: __ And(tos, tos, Operand(value)); break;
1414 default: UNREACHABLE(); 1414 default: UNREACHABLE();
1415 } 1415 }
1416 deferred->BindExit(); 1416 deferred->BindExit();
1417 TypeInfo result_type = 1417 TypeInfo result_type = TypeInfo::Integer32();
1418 (op == Token::BIT_AND) ? TypeInfo::Smi() : TypeInfo::Integer32(); 1418 if (op == Token::BIT_AND && int_value >= 0) {
1419 result_type = TypeInfo::Smi();
1420 }
1419 frame_->EmitPush(tos, result_type); 1421 frame_->EmitPush(tos, result_type);
1420 } 1422 }
1421 break; 1423 break;
1422 } 1424 }
1423 1425
1424 case Token::SHL: 1426 case Token::SHL:
1425 if (reversed) { 1427 if (reversed) {
1426 ASSERT(both_sides_are_smi); 1428 ASSERT(both_sides_are_smi);
1427 int max_shift = 0; 1429 int max_shift = 0;
1428 int max_result = int_value == 0 ? 1 : int_value; 1430 int max_result = int_value == 0 ? 1 : int_value;
(...skipping 5935 matching lines...) Expand 10 before | Expand all | Expand 10 after
7364 BinaryOpIC::GetName(runtime_operands_type_)); 7366 BinaryOpIC::GetName(runtime_operands_type_));
7365 return name_; 7367 return name_;
7366 } 7368 }
7367 7369
7368 7370
7369 #undef __ 7371 #undef __
7370 7372
7371 } } // namespace v8::internal 7373 } } // namespace v8::internal
7372 7374
7373 #endif // V8_TARGET_ARCH_ARM 7375 #endif // V8_TARGET_ARCH_ARM
OLDNEW
« no previous file with comments | « no previous file | src/version.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698