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Issue 6670119: VM initialization refactoring. (Closed)
Patch Set: Created 9 years, 8 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 30 matching lines...) Expand all
41 #include "disassembler.h" 41 #include "disassembler.h"
42 #include "macro-assembler.h" 42 #include "macro-assembler.h"
43 #include "serialize.h" 43 #include "serialize.h"
44 44
45 namespace v8 { 45 namespace v8 {
46 namespace internal { 46 namespace internal {
47 47
48 // ----------------------------------------------------------------------------- 48 // -----------------------------------------------------------------------------
49 // Implementation of CpuFeatures 49 // Implementation of CpuFeatures
50 50
51 CpuFeatures::CpuFeatures() 51 #ifdef DEBUG
52 : supported_(0), 52 bool CpuFeatures::initialized_ = false;
53 enabled_(0), 53 #endif
54 found_by_runtime_probing_(0) { 54 uint64_t CpuFeatures::supported_ = 0;
55 } 55 uint64_t CpuFeatures::found_by_runtime_probing_ = 0;
56 56
57 57
58 // The Probe method needs executable memory, so it uses Heap::CreateCode. 58 // The Probe method needs executable memory, so it uses Heap::CreateCode.
59 // Allocation failure is silent and leads to safe default. 59 // Allocation failure is silent and leads to safe default.
60 void CpuFeatures::Probe(bool portable) { 60 void CpuFeatures::Probe(bool portable) {
61 ASSERT(HEAP->HasBeenSetup()); 61 ASSERT(!initialized_);
62 ASSERT(supported_ == 0); 62 ASSERT(supported_ == 0);
63 #ifdef DEBUG
64 initialized_ = true;
65 #endif
63 if (portable && Serializer::enabled()) { 66 if (portable && Serializer::enabled()) {
64 supported_ |= OS::CpuFeaturesImpliedByPlatform(); 67 supported_ |= OS::CpuFeaturesImpliedByPlatform();
65 return; // No features if we might serialize. 68 return; // No features if we might serialize.
66 } 69 }
67 70
68 Assembler assm(NULL, 0); 71 const int kBufferSize = 4 * KB;
72 VirtualMemory* memory = new VirtualMemory(kBufferSize);
73 if (!memory->IsReserved()) {
74 delete memory;
75 return;
76 }
77 ASSERT(memory->size() >= static_cast<size_t>(kBufferSize));
78 if (!memory->Commit(memory->address(), kBufferSize, true/*executable*/)) {
79 delete memory;
80 return;
81 }
82
83 Assembler assm(NULL, memory->address(), kBufferSize);
69 Label cpuid, done; 84 Label cpuid, done;
70 #define __ assm. 85 #define __ assm.
71 // Save old esp, since we are going to modify the stack. 86 // Save old esp, since we are going to modify the stack.
72 __ push(ebp); 87 __ push(ebp);
73 __ pushfd(); 88 __ pushfd();
74 __ push(ecx); 89 __ push(ecx);
75 __ push(ebx); 90 __ push(ebx);
76 __ mov(ebp, Operand(esp)); 91 __ mov(ebp, Operand(esp));
77 92
78 // If we can modify bit 21 of the EFLAGS register, then CPUID is supported. 93 // If we can modify bit 21 of the EFLAGS register, then CPUID is supported.
(...skipping 33 matching lines...) Expand 10 before | Expand all | Expand 10 after
112 // Done. 127 // Done.
113 __ bind(&done); 128 __ bind(&done);
114 __ mov(esp, Operand(ebp)); 129 __ mov(esp, Operand(ebp));
115 __ pop(ebx); 130 __ pop(ebx);
116 __ pop(ecx); 131 __ pop(ecx);
117 __ popfd(); 132 __ popfd();
118 __ pop(ebp); 133 __ pop(ebp);
119 __ ret(0); 134 __ ret(0);
120 #undef __ 135 #undef __
121 136
122 CodeDesc desc;
123 assm.GetCode(&desc);
124 Object* code;
125 { MaybeObject* maybe_code =
126 assm.isolate()->heap()->CreateCode(desc,
127 Code::ComputeFlags(Code::STUB),
128 Handle<Code>::null());
129 if (!maybe_code->ToObject(&code)) return;
130 }
131 if (!code->IsCode()) return;
132
133 PROFILE(ISOLATE,
134 CodeCreateEvent(Logger::BUILTIN_TAG,
135 Code::cast(code), "CpuFeatures::Probe"));
136 typedef uint64_t (*F0)(); 137 typedef uint64_t (*F0)();
137 F0 probe = FUNCTION_CAST<F0>(Code::cast(code)->entry()); 138 F0 probe = FUNCTION_CAST<F0>(reinterpret_cast<Address>(memory->address()));
138 supported_ = probe(); 139 supported_ = probe();
139 found_by_runtime_probing_ = supported_; 140 found_by_runtime_probing_ = supported_;
140 uint64_t os_guarantees = OS::CpuFeaturesImpliedByPlatform(); 141 uint64_t os_guarantees = OS::CpuFeaturesImpliedByPlatform();
141 supported_ |= os_guarantees; 142 supported_ |= os_guarantees;
142 found_by_runtime_probing_ &= portable ? ~os_guarantees : 0; 143 found_by_runtime_probing_ &= portable ? ~os_guarantees : 0;
144
145 delete memory;
143 } 146 }
144 147
145 148
146 // ----------------------------------------------------------------------------- 149 // -----------------------------------------------------------------------------
147 // Implementation of Displacement 150 // Implementation of Displacement
148 151
149 void Displacement::init(Label* L, Type type) { 152 void Displacement::init(Label* L, Type type) {
150 ASSERT(!L->is_bound()); 153 ASSERT(!L->is_bound());
151 int next = 0; 154 int next = 0;
152 if (L->is_linked()) { 155 if (L->is_linked()) {
(...skipping 137 matching lines...) Expand 10 before | Expand all | Expand 10 after
290 293
291 // Emit a single byte. Must always be inlined. 294 // Emit a single byte. Must always be inlined.
292 #define EMIT(x) \ 295 #define EMIT(x) \
293 *pc_++ = (x) 296 *pc_++ = (x)
294 297
295 298
296 #ifdef GENERATED_CODE_COVERAGE 299 #ifdef GENERATED_CODE_COVERAGE
297 static void InitCoverageLog(); 300 static void InitCoverageLog();
298 #endif 301 #endif
299 302
300 Assembler::Assembler(void* buffer, int buffer_size) 303 Assembler::Assembler(Isolate* arg_isolate, void* buffer, int buffer_size)
301 : AssemblerBase(Isolate::Current()), 304 : AssemblerBase(arg_isolate),
302 positions_recorder_(this), 305 positions_recorder_(this),
303 emit_debug_code_(FLAG_debug_code) { 306 emit_debug_code_(FLAG_debug_code) {
304 if (buffer == NULL) { 307 if (buffer == NULL) {
305 // Do our own buffer management. 308 // Do our own buffer management.
306 if (buffer_size <= kMinimalBufferSize) { 309 if (buffer_size <= kMinimalBufferSize) {
307 buffer_size = kMinimalBufferSize; 310 buffer_size = kMinimalBufferSize;
308 311
309 if (isolate()->assembler_spare_buffer() != NULL) { 312 if (isolate()->assembler_spare_buffer() != NULL) {
310 buffer = isolate()->assembler_spare_buffer(); 313 buffer = isolate()->assembler_spare_buffer();
311 isolate()->set_assembler_spare_buffer(NULL); 314 isolate()->set_assembler_spare_buffer(NULL);
(...skipping 67 matching lines...) Expand 10 before | Expand all | Expand 10 after
379 } 382 }
380 } 383 }
381 384
382 385
383 void Assembler::CodeTargetAlign() { 386 void Assembler::CodeTargetAlign() {
384 Align(16); // Preferred alignment of jump targets on ia32. 387 Align(16); // Preferred alignment of jump targets on ia32.
385 } 388 }
386 389
387 390
388 void Assembler::cpuid() { 391 void Assembler::cpuid() {
389 ASSERT(isolate()->cpu_features()->IsEnabled(CPUID)); 392 ASSERT(CpuFeatures::IsEnabled(CPUID));
390 EnsureSpace ensure_space(this); 393 EnsureSpace ensure_space(this);
391 last_pc_ = pc_; 394 last_pc_ = pc_;
392 EMIT(0x0F); 395 EMIT(0x0F);
393 EMIT(0xA2); 396 EMIT(0xA2);
394 } 397 }
395 398
396 399
397 void Assembler::pushad() { 400 void Assembler::pushad() {
398 EnsureSpace ensure_space(this); 401 EnsureSpace ensure_space(this);
399 last_pc_ = pc_; 402 last_pc_ = pc_;
(...skipping 340 matching lines...) Expand 10 before | Expand all | Expand 10 after
740 void Assembler::movzx_w(Register dst, const Operand& src) { 743 void Assembler::movzx_w(Register dst, const Operand& src) {
741 EnsureSpace ensure_space(this); 744 EnsureSpace ensure_space(this);
742 last_pc_ = pc_; 745 last_pc_ = pc_;
743 EMIT(0x0F); 746 EMIT(0x0F);
744 EMIT(0xB7); 747 EMIT(0xB7);
745 emit_operand(dst, src); 748 emit_operand(dst, src);
746 } 749 }
747 750
748 751
749 void Assembler::cmov(Condition cc, Register dst, int32_t imm32) { 752 void Assembler::cmov(Condition cc, Register dst, int32_t imm32) {
750 ASSERT(isolate()->cpu_features()->IsEnabled(CMOV)); 753 ASSERT(CpuFeatures::IsEnabled(CMOV));
751 EnsureSpace ensure_space(this); 754 EnsureSpace ensure_space(this);
752 last_pc_ = pc_; 755 last_pc_ = pc_;
753 UNIMPLEMENTED(); 756 UNIMPLEMENTED();
754 USE(cc); 757 USE(cc);
755 USE(dst); 758 USE(dst);
756 USE(imm32); 759 USE(imm32);
757 } 760 }
758 761
759 762
760 void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) { 763 void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) {
761 ASSERT(isolate()->cpu_features()->IsEnabled(CMOV)); 764 ASSERT(CpuFeatures::IsEnabled(CMOV));
762 EnsureSpace ensure_space(this); 765 EnsureSpace ensure_space(this);
763 last_pc_ = pc_; 766 last_pc_ = pc_;
764 UNIMPLEMENTED(); 767 UNIMPLEMENTED();
765 USE(cc); 768 USE(cc);
766 USE(dst); 769 USE(dst);
767 USE(handle); 770 USE(handle);
768 } 771 }
769 772
770 773
771 void Assembler::cmov(Condition cc, Register dst, const Operand& src) { 774 void Assembler::cmov(Condition cc, Register dst, const Operand& src) {
772 ASSERT(isolate()->cpu_features()->IsEnabled(CMOV)); 775 ASSERT(CpuFeatures::IsEnabled(CMOV));
773 EnsureSpace ensure_space(this); 776 EnsureSpace ensure_space(this);
774 last_pc_ = pc_; 777 last_pc_ = pc_;
775 // Opcode: 0f 40 + cc /r. 778 // Opcode: 0f 40 + cc /r.
776 EMIT(0x0F); 779 EMIT(0x0F);
777 EMIT(0x40 + cc); 780 EMIT(0x40 + cc);
778 emit_operand(dst, src); 781 emit_operand(dst, src);
779 } 782 }
780 783
781 784
782 void Assembler::cld() { 785 void Assembler::cld() {
(...skipping 660 matching lines...) Expand 10 before | Expand all | Expand 10 after
1443 1446
1444 1447
1445 void Assembler::nop() { 1448 void Assembler::nop() {
1446 EnsureSpace ensure_space(this); 1449 EnsureSpace ensure_space(this);
1447 last_pc_ = pc_; 1450 last_pc_ = pc_;
1448 EMIT(0x90); 1451 EMIT(0x90);
1449 } 1452 }
1450 1453
1451 1454
1452 void Assembler::rdtsc() { 1455 void Assembler::rdtsc() {
1453 ASSERT(isolate()->cpu_features()->IsEnabled(RDTSC)); 1456 ASSERT(CpuFeatures::IsEnabled(RDTSC));
1454 EnsureSpace ensure_space(this); 1457 EnsureSpace ensure_space(this);
1455 last_pc_ = pc_; 1458 last_pc_ = pc_;
1456 EMIT(0x0F); 1459 EMIT(0x0F);
1457 EMIT(0x31); 1460 EMIT(0x31);
1458 } 1461 }
1459 1462
1460 1463
1461 void Assembler::ret(int imm16) { 1464 void Assembler::ret(int imm16) {
1462 EnsureSpace ensure_space(this); 1465 EnsureSpace ensure_space(this);
1463 last_pc_ = pc_; 1466 last_pc_ = pc_;
(...skipping 385 matching lines...) Expand 10 before | Expand all | Expand 10 after
1849 1852
1850 void Assembler::fistp_s(const Operand& adr) { 1853 void Assembler::fistp_s(const Operand& adr) {
1851 EnsureSpace ensure_space(this); 1854 EnsureSpace ensure_space(this);
1852 last_pc_ = pc_; 1855 last_pc_ = pc_;
1853 EMIT(0xDB); 1856 EMIT(0xDB);
1854 emit_operand(ebx, adr); 1857 emit_operand(ebx, adr);
1855 } 1858 }
1856 1859
1857 1860
1858 void Assembler::fisttp_s(const Operand& adr) { 1861 void Assembler::fisttp_s(const Operand& adr) {
1859 ASSERT(isolate()->cpu_features()->IsEnabled(SSE3)); 1862 ASSERT(CpuFeatures::IsEnabled(SSE3));
1860 EnsureSpace ensure_space(this); 1863 EnsureSpace ensure_space(this);
1861 last_pc_ = pc_; 1864 last_pc_ = pc_;
1862 EMIT(0xDB); 1865 EMIT(0xDB);
1863 emit_operand(ecx, adr); 1866 emit_operand(ecx, adr);
1864 } 1867 }
1865 1868
1866 1869
1867 void Assembler::fisttp_d(const Operand& adr) { 1870 void Assembler::fisttp_d(const Operand& adr) {
1868 ASSERT(isolate()->cpu_features()->IsEnabled(SSE3)); 1871 ASSERT(CpuFeatures::IsEnabled(SSE3));
1869 EnsureSpace ensure_space(this); 1872 EnsureSpace ensure_space(this);
1870 last_pc_ = pc_; 1873 last_pc_ = pc_;
1871 EMIT(0xDD); 1874 EMIT(0xDD);
1872 emit_operand(ecx, adr); 1875 emit_operand(ecx, adr);
1873 } 1876 }
1874 1877
1875 1878
1876 void Assembler::fist_s(const Operand& adr) { 1879 void Assembler::fist_s(const Operand& adr) {
1877 EnsureSpace ensure_space(this); 1880 EnsureSpace ensure_space(this);
1878 last_pc_ = pc_; 1881 last_pc_ = pc_;
(...skipping 248 matching lines...) Expand 10 before | Expand all | Expand 10 after
2127 ASSERT(reg.is_byte_register()); 2130 ASSERT(reg.is_byte_register());
2128 EnsureSpace ensure_space(this); 2131 EnsureSpace ensure_space(this);
2129 last_pc_ = pc_; 2132 last_pc_ = pc_;
2130 EMIT(0x0F); 2133 EMIT(0x0F);
2131 EMIT(0x90 | cc); 2134 EMIT(0x90 | cc);
2132 EMIT(0xC0 | reg.code()); 2135 EMIT(0xC0 | reg.code());
2133 } 2136 }
2134 2137
2135 2138
2136 void Assembler::cvttss2si(Register dst, const Operand& src) { 2139 void Assembler::cvttss2si(Register dst, const Operand& src) {
2137 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2140 ASSERT(CpuFeatures::IsEnabled(SSE2));
2138 EnsureSpace ensure_space(this); 2141 EnsureSpace ensure_space(this);
2139 last_pc_ = pc_; 2142 last_pc_ = pc_;
2140 EMIT(0xF3); 2143 EMIT(0xF3);
2141 EMIT(0x0F); 2144 EMIT(0x0F);
2142 EMIT(0x2C); 2145 EMIT(0x2C);
2143 emit_operand(dst, src); 2146 emit_operand(dst, src);
2144 } 2147 }
2145 2148
2146 2149
2147 void Assembler::cvttsd2si(Register dst, const Operand& src) { 2150 void Assembler::cvttsd2si(Register dst, const Operand& src) {
2148 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2151 ASSERT(CpuFeatures::IsEnabled(SSE2));
2149 EnsureSpace ensure_space(this); 2152 EnsureSpace ensure_space(this);
2150 last_pc_ = pc_; 2153 last_pc_ = pc_;
2151 EMIT(0xF2); 2154 EMIT(0xF2);
2152 EMIT(0x0F); 2155 EMIT(0x0F);
2153 EMIT(0x2C); 2156 EMIT(0x2C);
2154 emit_operand(dst, src); 2157 emit_operand(dst, src);
2155 } 2158 }
2156 2159
2157 2160
2158 void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) { 2161 void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) {
2159 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2162 ASSERT(CpuFeatures::IsEnabled(SSE2));
2160 EnsureSpace ensure_space(this); 2163 EnsureSpace ensure_space(this);
2161 last_pc_ = pc_; 2164 last_pc_ = pc_;
2162 EMIT(0xF2); 2165 EMIT(0xF2);
2163 EMIT(0x0F); 2166 EMIT(0x0F);
2164 EMIT(0x2A); 2167 EMIT(0x2A);
2165 emit_sse_operand(dst, src); 2168 emit_sse_operand(dst, src);
2166 } 2169 }
2167 2170
2168 2171
2169 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) { 2172 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
2170 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2173 ASSERT(CpuFeatures::IsEnabled(SSE2));
2171 EnsureSpace ensure_space(this); 2174 EnsureSpace ensure_space(this);
2172 last_pc_ = pc_; 2175 last_pc_ = pc_;
2173 EMIT(0xF3); 2176 EMIT(0xF3);
2174 EMIT(0x0F); 2177 EMIT(0x0F);
2175 EMIT(0x5A); 2178 EMIT(0x5A);
2176 emit_sse_operand(dst, src); 2179 emit_sse_operand(dst, src);
2177 } 2180 }
2178 2181
2179 2182
2180 void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) { 2183 void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) {
2181 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2184 ASSERT(CpuFeatures::IsEnabled(SSE2));
2182 EnsureSpace ensure_space(this); 2185 EnsureSpace ensure_space(this);
2183 last_pc_ = pc_; 2186 last_pc_ = pc_;
2184 EMIT(0xF2); 2187 EMIT(0xF2);
2185 EMIT(0x0F); 2188 EMIT(0x0F);
2186 EMIT(0x5A); 2189 EMIT(0x5A);
2187 emit_sse_operand(dst, src); 2190 emit_sse_operand(dst, src);
2188 } 2191 }
2189 2192
2190 2193
2191 void Assembler::addsd(XMMRegister dst, XMMRegister src) { 2194 void Assembler::addsd(XMMRegister dst, XMMRegister src) {
2192 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2195 ASSERT(CpuFeatures::IsEnabled(SSE2));
2193 EnsureSpace ensure_space(this); 2196 EnsureSpace ensure_space(this);
2194 last_pc_ = pc_; 2197 last_pc_ = pc_;
2195 EMIT(0xF2); 2198 EMIT(0xF2);
2196 EMIT(0x0F); 2199 EMIT(0x0F);
2197 EMIT(0x58); 2200 EMIT(0x58);
2198 emit_sse_operand(dst, src); 2201 emit_sse_operand(dst, src);
2199 } 2202 }
2200 2203
2201 2204
2202 void Assembler::mulsd(XMMRegister dst, XMMRegister src) { 2205 void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
2203 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2206 ASSERT(CpuFeatures::IsEnabled(SSE2));
2204 EnsureSpace ensure_space(this); 2207 EnsureSpace ensure_space(this);
2205 last_pc_ = pc_; 2208 last_pc_ = pc_;
2206 EMIT(0xF2); 2209 EMIT(0xF2);
2207 EMIT(0x0F); 2210 EMIT(0x0F);
2208 EMIT(0x59); 2211 EMIT(0x59);
2209 emit_sse_operand(dst, src); 2212 emit_sse_operand(dst, src);
2210 } 2213 }
2211 2214
2212 2215
2213 void Assembler::subsd(XMMRegister dst, XMMRegister src) { 2216 void Assembler::subsd(XMMRegister dst, XMMRegister src) {
2214 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2217 ASSERT(CpuFeatures::IsEnabled(SSE2));
2215 EnsureSpace ensure_space(this); 2218 EnsureSpace ensure_space(this);
2216 last_pc_ = pc_; 2219 last_pc_ = pc_;
2217 EMIT(0xF2); 2220 EMIT(0xF2);
2218 EMIT(0x0F); 2221 EMIT(0x0F);
2219 EMIT(0x5C); 2222 EMIT(0x5C);
2220 emit_sse_operand(dst, src); 2223 emit_sse_operand(dst, src);
2221 } 2224 }
2222 2225
2223 2226
2224 void Assembler::divsd(XMMRegister dst, XMMRegister src) { 2227 void Assembler::divsd(XMMRegister dst, XMMRegister src) {
2225 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2228 ASSERT(CpuFeatures::IsEnabled(SSE2));
2226 EnsureSpace ensure_space(this); 2229 EnsureSpace ensure_space(this);
2227 last_pc_ = pc_; 2230 last_pc_ = pc_;
2228 EMIT(0xF2); 2231 EMIT(0xF2);
2229 EMIT(0x0F); 2232 EMIT(0x0F);
2230 EMIT(0x5E); 2233 EMIT(0x5E);
2231 emit_sse_operand(dst, src); 2234 emit_sse_operand(dst, src);
2232 } 2235 }
2233 2236
2234 2237
2235 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { 2238 void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
2236 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2239 ASSERT(CpuFeatures::IsEnabled(SSE2));
2237 EnsureSpace ensure_space(this); 2240 EnsureSpace ensure_space(this);
2238 last_pc_ = pc_; 2241 last_pc_ = pc_;
2239 EMIT(0x66); 2242 EMIT(0x66);
2240 EMIT(0x0F); 2243 EMIT(0x0F);
2241 EMIT(0x57); 2244 EMIT(0x57);
2242 emit_sse_operand(dst, src); 2245 emit_sse_operand(dst, src);
2243 } 2246 }
2244 2247
2245 2248
2246 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { 2249 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
(...skipping 10 matching lines...) Expand all
2257 EnsureSpace ensure_space(this); 2260 EnsureSpace ensure_space(this);
2258 last_pc_ = pc_; 2261 last_pc_ = pc_;
2259 EMIT(0x66); 2262 EMIT(0x66);
2260 EMIT(0x0F); 2263 EMIT(0x0F);
2261 EMIT(0x54); 2264 EMIT(0x54);
2262 emit_sse_operand(dst, src); 2265 emit_sse_operand(dst, src);
2263 } 2266 }
2264 2267
2265 2268
2266 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { 2269 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
2267 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2270 ASSERT(CpuFeatures::IsEnabled(SSE2));
2268 EnsureSpace ensure_space(this); 2271 EnsureSpace ensure_space(this);
2269 last_pc_ = pc_; 2272 last_pc_ = pc_;
2270 EMIT(0x66); 2273 EMIT(0x66);
2271 EMIT(0x0F); 2274 EMIT(0x0F);
2272 EMIT(0x2E); 2275 EMIT(0x2E);
2273 emit_sse_operand(dst, src); 2276 emit_sse_operand(dst, src);
2274 } 2277 }
2275 2278
2276 2279
2277 void Assembler::movmskpd(Register dst, XMMRegister src) { 2280 void Assembler::movmskpd(Register dst, XMMRegister src) {
2278 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2281 ASSERT(CpuFeatures::IsEnabled(SSE2));
2279 EnsureSpace ensure_space(this); 2282 EnsureSpace ensure_space(this);
2280 last_pc_ = pc_; 2283 last_pc_ = pc_;
2281 EMIT(0x66); 2284 EMIT(0x66);
2282 EMIT(0x0F); 2285 EMIT(0x0F);
2283 EMIT(0x50); 2286 EMIT(0x50);
2284 emit_sse_operand(dst, src); 2287 emit_sse_operand(dst, src);
2285 } 2288 }
2286 2289
2287 2290
2288 void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) { 2291 void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) {
2289 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2292 ASSERT(CpuFeatures::IsEnabled(SSE2));
2290 EnsureSpace ensure_space(this); 2293 EnsureSpace ensure_space(this);
2291 last_pc_ = pc_; 2294 last_pc_ = pc_;
2292 EMIT(0xF2); 2295 EMIT(0xF2);
2293 EMIT(0x0F); 2296 EMIT(0x0F);
2294 EMIT(0xC2); 2297 EMIT(0xC2);
2295 emit_sse_operand(dst, src); 2298 emit_sse_operand(dst, src);
2296 EMIT(1); // LT == 1 2299 EMIT(1); // LT == 1
2297 } 2300 }
2298 2301
2299 2302
2300 void Assembler::movaps(XMMRegister dst, XMMRegister src) { 2303 void Assembler::movaps(XMMRegister dst, XMMRegister src) {
2301 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2304 ASSERT(CpuFeatures::IsEnabled(SSE2));
2302 EnsureSpace ensure_space(this); 2305 EnsureSpace ensure_space(this);
2303 last_pc_ = pc_; 2306 last_pc_ = pc_;
2304 EMIT(0x0F); 2307 EMIT(0x0F);
2305 EMIT(0x28); 2308 EMIT(0x28);
2306 emit_sse_operand(dst, src); 2309 emit_sse_operand(dst, src);
2307 } 2310 }
2308 2311
2309 2312
2310 void Assembler::movdqa(const Operand& dst, XMMRegister src) { 2313 void Assembler::movdqa(const Operand& dst, XMMRegister src) {
2311 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2314 ASSERT(CpuFeatures::IsEnabled(SSE2));
2312 EnsureSpace ensure_space(this); 2315 EnsureSpace ensure_space(this);
2313 last_pc_ = pc_; 2316 last_pc_ = pc_;
2314 EMIT(0x66); 2317 EMIT(0x66);
2315 EMIT(0x0F); 2318 EMIT(0x0F);
2316 EMIT(0x7F); 2319 EMIT(0x7F);
2317 emit_sse_operand(src, dst); 2320 emit_sse_operand(src, dst);
2318 } 2321 }
2319 2322
2320 2323
2321 void Assembler::movdqa(XMMRegister dst, const Operand& src) { 2324 void Assembler::movdqa(XMMRegister dst, const Operand& src) {
2322 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2325 ASSERT(CpuFeatures::IsEnabled(SSE2));
2323 EnsureSpace ensure_space(this); 2326 EnsureSpace ensure_space(this);
2324 last_pc_ = pc_; 2327 last_pc_ = pc_;
2325 EMIT(0x66); 2328 EMIT(0x66);
2326 EMIT(0x0F); 2329 EMIT(0x0F);
2327 EMIT(0x6F); 2330 EMIT(0x6F);
2328 emit_sse_operand(dst, src); 2331 emit_sse_operand(dst, src);
2329 } 2332 }
2330 2333
2331 2334
2332 void Assembler::movdqu(const Operand& dst, XMMRegister src ) { 2335 void Assembler::movdqu(const Operand& dst, XMMRegister src ) {
2333 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2336 ASSERT(CpuFeatures::IsEnabled(SSE2));
2334 EnsureSpace ensure_space(this); 2337 EnsureSpace ensure_space(this);
2335 last_pc_ = pc_; 2338 last_pc_ = pc_;
2336 EMIT(0xF3); 2339 EMIT(0xF3);
2337 EMIT(0x0F); 2340 EMIT(0x0F);
2338 EMIT(0x7F); 2341 EMIT(0x7F);
2339 emit_sse_operand(src, dst); 2342 emit_sse_operand(src, dst);
2340 } 2343 }
2341 2344
2342 2345
2343 void Assembler::movdqu(XMMRegister dst, const Operand& src) { 2346 void Assembler::movdqu(XMMRegister dst, const Operand& src) {
2344 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2347 ASSERT(CpuFeatures::IsEnabled(SSE2));
2345 EnsureSpace ensure_space(this); 2348 EnsureSpace ensure_space(this);
2346 last_pc_ = pc_; 2349 last_pc_ = pc_;
2347 EMIT(0xF3); 2350 EMIT(0xF3);
2348 EMIT(0x0F); 2351 EMIT(0x0F);
2349 EMIT(0x6F); 2352 EMIT(0x6F);
2350 emit_sse_operand(dst, src); 2353 emit_sse_operand(dst, src);
2351 } 2354 }
2352 2355
2353 2356
2354 void Assembler::movntdqa(XMMRegister dst, const Operand& src) { 2357 void Assembler::movntdqa(XMMRegister dst, const Operand& src) {
2355 ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1)); 2358 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2356 EnsureSpace ensure_space(this); 2359 EnsureSpace ensure_space(this);
2357 last_pc_ = pc_; 2360 last_pc_ = pc_;
2358 EMIT(0x66); 2361 EMIT(0x66);
2359 EMIT(0x0F); 2362 EMIT(0x0F);
2360 EMIT(0x38); 2363 EMIT(0x38);
2361 EMIT(0x2A); 2364 EMIT(0x2A);
2362 emit_sse_operand(dst, src); 2365 emit_sse_operand(dst, src);
2363 } 2366 }
2364 2367
2365 2368
2366 void Assembler::movntdq(const Operand& dst, XMMRegister src) { 2369 void Assembler::movntdq(const Operand& dst, XMMRegister src) {
2367 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2370 ASSERT(CpuFeatures::IsEnabled(SSE2));
2368 EnsureSpace ensure_space(this); 2371 EnsureSpace ensure_space(this);
2369 last_pc_ = pc_; 2372 last_pc_ = pc_;
2370 EMIT(0x66); 2373 EMIT(0x66);
2371 EMIT(0x0F); 2374 EMIT(0x0F);
2372 EMIT(0xE7); 2375 EMIT(0xE7);
2373 emit_sse_operand(src, dst); 2376 emit_sse_operand(src, dst);
2374 } 2377 }
2375 2378
2376 2379
2377 void Assembler::prefetch(const Operand& src, int level) { 2380 void Assembler::prefetch(const Operand& src, int level) {
(...skipping 15 matching lines...) Expand all
2393 2396
2394 2397
2395 void Assembler::movdbl(const Operand& dst, XMMRegister src) { 2398 void Assembler::movdbl(const Operand& dst, XMMRegister src) {
2396 EnsureSpace ensure_space(this); 2399 EnsureSpace ensure_space(this);
2397 last_pc_ = pc_; 2400 last_pc_ = pc_;
2398 movsd(dst, src); 2401 movsd(dst, src);
2399 } 2402 }
2400 2403
2401 2404
2402 void Assembler::movsd(const Operand& dst, XMMRegister src ) { 2405 void Assembler::movsd(const Operand& dst, XMMRegister src ) {
2403 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2406 ASSERT(CpuFeatures::IsEnabled(SSE2));
2404 EnsureSpace ensure_space(this); 2407 EnsureSpace ensure_space(this);
2405 last_pc_ = pc_; 2408 last_pc_ = pc_;
2406 EMIT(0xF2); // double 2409 EMIT(0xF2); // double
2407 EMIT(0x0F); 2410 EMIT(0x0F);
2408 EMIT(0x11); // store 2411 EMIT(0x11); // store
2409 emit_sse_operand(src, dst); 2412 emit_sse_operand(src, dst);
2410 } 2413 }
2411 2414
2412 2415
2413 void Assembler::movsd(XMMRegister dst, const Operand& src) { 2416 void Assembler::movsd(XMMRegister dst, const Operand& src) {
2414 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2417 ASSERT(CpuFeatures::IsEnabled(SSE2));
2415 EnsureSpace ensure_space(this); 2418 EnsureSpace ensure_space(this);
2416 last_pc_ = pc_; 2419 last_pc_ = pc_;
2417 EMIT(0xF2); // double 2420 EMIT(0xF2); // double
2418 EMIT(0x0F); 2421 EMIT(0x0F);
2419 EMIT(0x10); // load 2422 EMIT(0x10); // load
2420 emit_sse_operand(dst, src); 2423 emit_sse_operand(dst, src);
2421 } 2424 }
2422 2425
2423 2426
2424 void Assembler::movsd(XMMRegister dst, XMMRegister src) { 2427 void Assembler::movsd(XMMRegister dst, XMMRegister src) {
2425 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2428 ASSERT(CpuFeatures::IsEnabled(SSE2));
2426 EnsureSpace ensure_space(this); 2429 EnsureSpace ensure_space(this);
2427 last_pc_ = pc_; 2430 last_pc_ = pc_;
2428 EMIT(0xF2); 2431 EMIT(0xF2);
2429 EMIT(0x0F); 2432 EMIT(0x0F);
2430 EMIT(0x10); 2433 EMIT(0x10);
2431 emit_sse_operand(dst, src); 2434 emit_sse_operand(dst, src);
2432 } 2435 }
2433 2436
2434 2437
2435 void Assembler::movss(const Operand& dst, XMMRegister src ) { 2438 void Assembler::movss(const Operand& dst, XMMRegister src ) {
2436 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2439 ASSERT(CpuFeatures::IsEnabled(SSE2));
2437 EnsureSpace ensure_space(this); 2440 EnsureSpace ensure_space(this);
2438 last_pc_ = pc_; 2441 last_pc_ = pc_;
2439 EMIT(0xF3); // float 2442 EMIT(0xF3); // float
2440 EMIT(0x0F); 2443 EMIT(0x0F);
2441 EMIT(0x11); // store 2444 EMIT(0x11); // store
2442 emit_sse_operand(src, dst); 2445 emit_sse_operand(src, dst);
2443 } 2446 }
2444 2447
2445 2448
2446 void Assembler::movss(XMMRegister dst, const Operand& src) { 2449 void Assembler::movss(XMMRegister dst, const Operand& src) {
2447 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2450 ASSERT(CpuFeatures::IsEnabled(SSE2));
2448 EnsureSpace ensure_space(this); 2451 EnsureSpace ensure_space(this);
2449 last_pc_ = pc_; 2452 last_pc_ = pc_;
2450 EMIT(0xF3); // float 2453 EMIT(0xF3); // float
2451 EMIT(0x0F); 2454 EMIT(0x0F);
2452 EMIT(0x10); // load 2455 EMIT(0x10); // load
2453 emit_sse_operand(dst, src); 2456 emit_sse_operand(dst, src);
2454 } 2457 }
2455 2458
2456 2459
2457 void Assembler::movss(XMMRegister dst, XMMRegister src) { 2460 void Assembler::movss(XMMRegister dst, XMMRegister src) {
2458 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2461 ASSERT(CpuFeatures::IsEnabled(SSE2));
2459 EnsureSpace ensure_space(this); 2462 EnsureSpace ensure_space(this);
2460 last_pc_ = pc_; 2463 last_pc_ = pc_;
2461 EMIT(0xF3); 2464 EMIT(0xF3);
2462 EMIT(0x0F); 2465 EMIT(0x0F);
2463 EMIT(0x10); 2466 EMIT(0x10);
2464 emit_sse_operand(dst, src); 2467 emit_sse_operand(dst, src);
2465 } 2468 }
2466 2469
2467 2470
2468 void Assembler::movd(XMMRegister dst, const Operand& src) { 2471 void Assembler::movd(XMMRegister dst, const Operand& src) {
2469 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2472 ASSERT(CpuFeatures::IsEnabled(SSE2));
2470 EnsureSpace ensure_space(this); 2473 EnsureSpace ensure_space(this);
2471 last_pc_ = pc_; 2474 last_pc_ = pc_;
2472 EMIT(0x66); 2475 EMIT(0x66);
2473 EMIT(0x0F); 2476 EMIT(0x0F);
2474 EMIT(0x6E); 2477 EMIT(0x6E);
2475 emit_sse_operand(dst, src); 2478 emit_sse_operand(dst, src);
2476 } 2479 }
2477 2480
2478 2481
2479 void Assembler::movd(const Operand& dst, XMMRegister src) { 2482 void Assembler::movd(const Operand& dst, XMMRegister src) {
2480 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2483 ASSERT(CpuFeatures::IsEnabled(SSE2));
2481 EnsureSpace ensure_space(this); 2484 EnsureSpace ensure_space(this);
2482 last_pc_ = pc_; 2485 last_pc_ = pc_;
2483 EMIT(0x66); 2486 EMIT(0x66);
2484 EMIT(0x0F); 2487 EMIT(0x0F);
2485 EMIT(0x7E); 2488 EMIT(0x7E);
2486 emit_sse_operand(src, dst); 2489 emit_sse_operand(src, dst);
2487 } 2490 }
2488 2491
2489 2492
2490 void Assembler::pand(XMMRegister dst, XMMRegister src) { 2493 void Assembler::pand(XMMRegister dst, XMMRegister src) {
2491 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2494 ASSERT(CpuFeatures::IsEnabled(SSE2));
2492 EnsureSpace ensure_space(this); 2495 EnsureSpace ensure_space(this);
2493 last_pc_ = pc_; 2496 last_pc_ = pc_;
2494 EMIT(0x66); 2497 EMIT(0x66);
2495 EMIT(0x0F); 2498 EMIT(0x0F);
2496 EMIT(0xDB); 2499 EMIT(0xDB);
2497 emit_sse_operand(dst, src); 2500 emit_sse_operand(dst, src);
2498 } 2501 }
2499 2502
2500 2503
2501 void Assembler::pxor(XMMRegister dst, XMMRegister src) { 2504 void Assembler::pxor(XMMRegister dst, XMMRegister src) {
2502 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2505 ASSERT(CpuFeatures::IsEnabled(SSE2));
2503 EnsureSpace ensure_space(this); 2506 EnsureSpace ensure_space(this);
2504 last_pc_ = pc_; 2507 last_pc_ = pc_;
2505 EMIT(0x66); 2508 EMIT(0x66);
2506 EMIT(0x0F); 2509 EMIT(0x0F);
2507 EMIT(0xEF); 2510 EMIT(0xEF);
2508 emit_sse_operand(dst, src); 2511 emit_sse_operand(dst, src);
2509 } 2512 }
2510 2513
2511 2514
2512 void Assembler::por(XMMRegister dst, XMMRegister src) { 2515 void Assembler::por(XMMRegister dst, XMMRegister src) {
2513 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2516 ASSERT(CpuFeatures::IsEnabled(SSE2));
2514 EnsureSpace ensure_space(this); 2517 EnsureSpace ensure_space(this);
2515 last_pc_ = pc_; 2518 last_pc_ = pc_;
2516 EMIT(0x66); 2519 EMIT(0x66);
2517 EMIT(0x0F); 2520 EMIT(0x0F);
2518 EMIT(0xEB); 2521 EMIT(0xEB);
2519 emit_sse_operand(dst, src); 2522 emit_sse_operand(dst, src);
2520 } 2523 }
2521 2524
2522 2525
2523 void Assembler::ptest(XMMRegister dst, XMMRegister src) { 2526 void Assembler::ptest(XMMRegister dst, XMMRegister src) {
2524 ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1)); 2527 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2525 EnsureSpace ensure_space(this); 2528 EnsureSpace ensure_space(this);
2526 last_pc_ = pc_; 2529 last_pc_ = pc_;
2527 EMIT(0x66); 2530 EMIT(0x66);
2528 EMIT(0x0F); 2531 EMIT(0x0F);
2529 EMIT(0x38); 2532 EMIT(0x38);
2530 EMIT(0x17); 2533 EMIT(0x17);
2531 emit_sse_operand(dst, src); 2534 emit_sse_operand(dst, src);
2532 } 2535 }
2533 2536
2534 2537
2535 void Assembler::psllq(XMMRegister reg, int8_t shift) { 2538 void Assembler::psllq(XMMRegister reg, int8_t shift) {
2536 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2539 ASSERT(CpuFeatures::IsEnabled(SSE2));
2537 EnsureSpace ensure_space(this); 2540 EnsureSpace ensure_space(this);
2538 last_pc_ = pc_; 2541 last_pc_ = pc_;
2539 EMIT(0x66); 2542 EMIT(0x66);
2540 EMIT(0x0F); 2543 EMIT(0x0F);
2541 EMIT(0x73); 2544 EMIT(0x73);
2542 emit_sse_operand(esi, reg); // esi == 6 2545 emit_sse_operand(esi, reg); // esi == 6
2543 EMIT(shift); 2546 EMIT(shift);
2544 } 2547 }
2545 2548
2546 2549
2547 void Assembler::psllq(XMMRegister dst, XMMRegister src) { 2550 void Assembler::psllq(XMMRegister dst, XMMRegister src) {
2548 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2551 ASSERT(CpuFeatures::IsEnabled(SSE2));
2549 EnsureSpace ensure_space(this); 2552 EnsureSpace ensure_space(this);
2550 last_pc_ = pc_; 2553 last_pc_ = pc_;
2551 EMIT(0x66); 2554 EMIT(0x66);
2552 EMIT(0x0F); 2555 EMIT(0x0F);
2553 EMIT(0xF3); 2556 EMIT(0xF3);
2554 emit_sse_operand(dst, src); 2557 emit_sse_operand(dst, src);
2555 } 2558 }
2556 2559
2557 2560
2558 void Assembler::psrlq(XMMRegister reg, int8_t shift) { 2561 void Assembler::psrlq(XMMRegister reg, int8_t shift) {
2559 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2562 ASSERT(CpuFeatures::IsEnabled(SSE2));
2560 EnsureSpace ensure_space(this); 2563 EnsureSpace ensure_space(this);
2561 last_pc_ = pc_; 2564 last_pc_ = pc_;
2562 EMIT(0x66); 2565 EMIT(0x66);
2563 EMIT(0x0F); 2566 EMIT(0x0F);
2564 EMIT(0x73); 2567 EMIT(0x73);
2565 emit_sse_operand(edx, reg); // edx == 2 2568 emit_sse_operand(edx, reg); // edx == 2
2566 EMIT(shift); 2569 EMIT(shift);
2567 } 2570 }
2568 2571
2569 2572
2570 void Assembler::psrlq(XMMRegister dst, XMMRegister src) { 2573 void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
2571 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2574 ASSERT(CpuFeatures::IsEnabled(SSE2));
2572 EnsureSpace ensure_space(this); 2575 EnsureSpace ensure_space(this);
2573 last_pc_ = pc_; 2576 last_pc_ = pc_;
2574 EMIT(0x66); 2577 EMIT(0x66);
2575 EMIT(0x0F); 2578 EMIT(0x0F);
2576 EMIT(0xD3); 2579 EMIT(0xD3);
2577 emit_sse_operand(dst, src); 2580 emit_sse_operand(dst, src);
2578 } 2581 }
2579 2582
2580 2583
2581 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) { 2584 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) {
2582 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2585 ASSERT(CpuFeatures::IsEnabled(SSE2));
2583 EnsureSpace ensure_space(this); 2586 EnsureSpace ensure_space(this);
2584 last_pc_ = pc_; 2587 last_pc_ = pc_;
2585 EMIT(0x66); 2588 EMIT(0x66);
2586 EMIT(0x0F); 2589 EMIT(0x0F);
2587 EMIT(0x70); 2590 EMIT(0x70);
2588 emit_sse_operand(dst, src); 2591 emit_sse_operand(dst, src);
2589 EMIT(shuffle); 2592 EMIT(shuffle);
2590 } 2593 }
2591 2594
2592 2595
2593 void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) { 2596 void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) {
2594 ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1)); 2597 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2595 EnsureSpace ensure_space(this); 2598 EnsureSpace ensure_space(this);
2596 last_pc_ = pc_; 2599 last_pc_ = pc_;
2597 EMIT(0x66); 2600 EMIT(0x66);
2598 EMIT(0x0F); 2601 EMIT(0x0F);
2599 EMIT(0x3A); 2602 EMIT(0x3A);
2600 EMIT(0x16); 2603 EMIT(0x16);
2601 emit_sse_operand(src, dst); 2604 emit_sse_operand(src, dst);
2602 EMIT(offset); 2605 EMIT(offset);
2603 } 2606 }
2604 2607
2605 2608
2606 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) { 2609 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) {
2607 ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1)); 2610 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2608 EnsureSpace ensure_space(this); 2611 EnsureSpace ensure_space(this);
2609 last_pc_ = pc_; 2612 last_pc_ = pc_;
2610 EMIT(0x66); 2613 EMIT(0x66);
2611 EMIT(0x0F); 2614 EMIT(0x0F);
2612 EMIT(0x3A); 2615 EMIT(0x3A);
2613 EMIT(0x22); 2616 EMIT(0x22);
2614 emit_sse_operand(dst, src); 2617 emit_sse_operand(dst, src);
2615 EMIT(offset); 2618 EMIT(offset);
2616 } 2619 }
2617 2620
(...skipping 218 matching lines...) Expand 10 before | Expand all | Expand 10 after
2836 fprintf(coverage_log, "%s\n", file_line); 2839 fprintf(coverage_log, "%s\n", file_line);
2837 fflush(coverage_log); 2840 fflush(coverage_log);
2838 } 2841 }
2839 } 2842 }
2840 2843
2841 #endif 2844 #endif
2842 2845
2843 } } // namespace v8::internal 2846 } } // namespace v8::internal
2844 2847
2845 #endif // V8_TARGET_ARCH_IA32 2848 #endif // V8_TARGET_ARCH_IA32
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