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Issue 6665006: Reduce strength of ModI for power-of-2 divisor. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: port to arm and x64 Created 9 years, 9 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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774 } 774 }
775 } 775 }
776 776
777 777
778 void LCodeGen::DoUnknownOSRValue(LUnknownOSRValue* instr) { 778 void LCodeGen::DoUnknownOSRValue(LUnknownOSRValue* instr) {
779 // Nothing to do. 779 // Nothing to do.
780 } 780 }
781 781
782 782
783 void LCodeGen::DoModI(LModI* instr) { 783 void LCodeGen::DoModI(LModI* instr) {
784 LOperand* right = instr->InputAt(1); 784 if (HMod::cast(instr->hydrogen())->HasPowerOf2Divisor()) {
785 ASSERT(ToRegister(instr->result()).is(edx)); 785 Register dividend = ToRegister(instr->InputAt(0));
786 ASSERT(ToRegister(instr->InputAt(0)).is(eax));
787 ASSERT(!ToRegister(instr->InputAt(1)).is(eax));
788 ASSERT(!ToRegister(instr->InputAt(1)).is(edx));
789 786
790 Register right_reg = ToRegister(right); 787 int32_t divisor =
788 HConstant::cast(
789 HMod::cast(instr->hydrogen())->right())->Integer32Value();
791 790
792 // Check for x % 0. 791 if (divisor < 0) divisor = -divisor;
793 if (instr->hydrogen()->CheckFlag(HValue::kCanBeDivByZero)) {
794 __ test(right_reg, ToOperand(right));
795 DeoptimizeIf(zero, instr->environment());
796 }
797 792
798 // Sign extend to edx. 793 NearLabel positive_dividend, done;
799 __ cdq(); 794 __ test(dividend, Operand(dividend));
800 795 __ j(not_sign, &positive_dividend);
801 // Check for (0 % -x) that will produce negative zero. 796 __ neg(dividend);
802 if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) { 797 __ and_(dividend, divisor - 1);
803 NearLabel positive_left; 798 __ neg(dividend);
804 NearLabel done; 799 if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) {
805 __ test(eax, Operand(eax)); 800 __ j(not_zero, &done);
806 __ j(not_sign, &positive_left); 801 DeoptimizeIf(no_condition, instr->environment());
807 __ idiv(right_reg); 802 }
808 803 __ bind(&positive_dividend);
809 // Test the remainder for 0, because then the result would be -0. 804 __ and_(dividend, divisor - 1);
810 __ test(edx, Operand(edx));
811 __ j(not_zero, &done);
812
813 DeoptimizeIf(no_condition, instr->environment());
814 __ bind(&positive_left);
815 __ idiv(right_reg);
816 __ bind(&done); 805 __ bind(&done);
817 } else { 806 } else {
818 __ idiv(right_reg); 807 LOperand* right = instr->InputAt(1);
808 ASSERT(ToRegister(instr->InputAt(0)).is(eax));
809 ASSERT(ToRegister(instr->result()).is(edx));
810
811 Register right_reg = ToRegister(right);
812 ASSERT(!right_reg.is(eax));
813 ASSERT(!right_reg.is(edx));
814
815 // Check for x % 0.
816 if (instr->hydrogen()->CheckFlag(HValue::kCanBeDivByZero)) {
817 __ test(right_reg, ToOperand(right));
818 DeoptimizeIf(zero, instr->environment());
819 }
820
821 // Sign extend to edx.
822 __ cdq();
823
824 // Check for (0 % -x) that will produce negative zero.
825 if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) {
826 NearLabel positive_left;
827 NearLabel done;
828 __ test(eax, Operand(eax));
829 __ j(not_sign, &positive_left);
830 __ idiv(right_reg);
831
832 // Test the remainder for 0, because then the result would be -0.
833 __ test(edx, Operand(edx));
834 __ j(not_zero, &done);
835
836 DeoptimizeIf(no_condition, instr->environment());
837 __ bind(&positive_left);
838 __ idiv(right_reg);
839 __ bind(&done);
840 } else {
841 __ idiv(right_reg);
842 }
819 } 843 }
820 } 844 }
821 845
822 846
823 void LCodeGen::DoDivI(LDivI* instr) { 847 void LCodeGen::DoDivI(LDivI* instr) {
824 LOperand* right = instr->InputAt(1); 848 LOperand* right = instr->InputAt(1);
825 ASSERT(ToRegister(instr->result()).is(eax)); 849 ASSERT(ToRegister(instr->result()).is(eax));
826 ASSERT(ToRegister(instr->InputAt(0)).is(eax)); 850 ASSERT(ToRegister(instr->InputAt(0)).is(eax));
827 ASSERT(!ToRegister(instr->InputAt(1)).is(eax)); 851 ASSERT(!ToRegister(instr->InputAt(1)).is(eax));
828 ASSERT(!ToRegister(instr->InputAt(1)).is(edx)); 852 ASSERT(!ToRegister(instr->InputAt(1)).is(edx));
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3870 ASSERT(osr_pc_offset_ == -1); 3894 ASSERT(osr_pc_offset_ == -1);
3871 osr_pc_offset_ = masm()->pc_offset(); 3895 osr_pc_offset_ = masm()->pc_offset();
3872 } 3896 }
3873 3897
3874 3898
3875 #undef __ 3899 #undef __
3876 3900
3877 } } // namespace v8::internal 3901 } } // namespace v8::internal
3878 3902
3879 #endif // V8_TARGET_ARCH_IA32 3903 #endif // V8_TARGET_ARCH_IA32
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