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1 // Copyright 2007-2008 the V8 project authors. All rights reserved. | 1 // Copyright 2007-2008 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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1366 int mod, regop, rm; | 1366 int mod, regop, rm; |
1367 get_modrm(*data, &mod, ®op, &rm); | 1367 get_modrm(*data, &mod, ®op, &rm); |
1368 data += PrintRightXMMOperand(data); | 1368 data += PrintRightXMMOperand(data); |
1369 AppendToBuffer(",%s", NameOfXMMRegister(regop)); | 1369 AppendToBuffer(",%s", NameOfXMMRegister(regop)); |
1370 } else if (b2 == 0x10) { | 1370 } else if (b2 == 0x10) { |
1371 data += 3; | 1371 data += 3; |
1372 int mod, regop, rm; | 1372 int mod, regop, rm; |
1373 get_modrm(*data, &mod, ®op, &rm); | 1373 get_modrm(*data, &mod, ®op, &rm); |
1374 AppendToBuffer("movsd %s,", NameOfXMMRegister(regop)); | 1374 AppendToBuffer("movsd %s,", NameOfXMMRegister(regop)); |
1375 data += PrintRightXMMOperand(data); | 1375 data += PrintRightXMMOperand(data); |
| 1376 } else if (b2 == 0x5A) { |
| 1377 data += 3; |
| 1378 int mod, regop, rm; |
| 1379 get_modrm(*data, &mod, ®op, &rm); |
| 1380 AppendToBuffer("cvtsd2ss %s,", NameOfXMMRegister(regop)); |
| 1381 data += PrintRightXMMOperand(data); |
1376 } else { | 1382 } else { |
1377 const char* mnem = "?"; | 1383 const char* mnem = "?"; |
1378 switch (b2) { | 1384 switch (b2) { |
1379 case 0x2A: mnem = "cvtsi2sd"; break; | 1385 case 0x2A: mnem = "cvtsi2sd"; break; |
1380 case 0x2C: mnem = "cvttsd2si"; break; | 1386 case 0x2C: mnem = "cvttsd2si"; break; |
1381 case 0x51: mnem = "sqrtsd"; break; | 1387 case 0x51: mnem = "sqrtsd"; break; |
1382 case 0x58: mnem = "addsd"; break; | 1388 case 0x58: mnem = "addsd"; break; |
1383 case 0x59: mnem = "mulsd"; break; | 1389 case 0x59: mnem = "mulsd"; break; |
1384 case 0x5C: mnem = "subsd"; break; | 1390 case 0x5C: mnem = "subsd"; break; |
1385 case 0x5E: mnem = "divsd"; break; | 1391 case 0x5E: mnem = "divsd"; break; |
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1415 data += PrintRightXMMOperand(data); | 1421 data += PrintRightXMMOperand(data); |
1416 } | 1422 } |
1417 } | 1423 } |
1418 } else { | 1424 } else { |
1419 UnimplementedInstruction(); | 1425 UnimplementedInstruction(); |
1420 } | 1426 } |
1421 break; | 1427 break; |
1422 | 1428 |
1423 case 0xF3: | 1429 case 0xF3: |
1424 if (*(data+1) == 0x0F) { | 1430 if (*(data+1) == 0x0F) { |
1425 if (*(data+2) == 0x2C) { | 1431 byte b2 = *(data+2); |
| 1432 if (b2 == 0x11) { |
| 1433 AppendToBuffer("movss "); |
| 1434 data += 3; |
| 1435 int mod, regop, rm; |
| 1436 get_modrm(*data, &mod, ®op, &rm); |
| 1437 data += PrintRightXMMOperand(data); |
| 1438 AppendToBuffer(",%s", NameOfXMMRegister(regop)); |
| 1439 } else if (b2 == 0x10) { |
| 1440 data += 3; |
| 1441 int mod, regop, rm; |
| 1442 get_modrm(*data, &mod, ®op, &rm); |
| 1443 AppendToBuffer("movss %s,", NameOfXMMRegister(regop)); |
| 1444 data += PrintRightXMMOperand(data); |
| 1445 } else if (b2 == 0x2C) { |
1426 data += 3; | 1446 data += 3; |
1427 int mod, regop, rm; | 1447 int mod, regop, rm; |
1428 get_modrm(*data, &mod, ®op, &rm); | 1448 get_modrm(*data, &mod, ®op, &rm); |
1429 AppendToBuffer("cvttss2si %s,", NameOfCPURegister(regop)); | 1449 AppendToBuffer("cvttss2si %s,", NameOfCPURegister(regop)); |
1430 data += PrintRightXMMOperand(data); | 1450 data += PrintRightXMMOperand(data); |
1431 } else if (*(data+2) == 0x5A) { | 1451 } else if (b2 == 0x5A) { |
1432 data += 3; | 1452 data += 3; |
1433 int mod, regop, rm; | 1453 int mod, regop, rm; |
1434 get_modrm(*data, &mod, ®op, &rm); | 1454 get_modrm(*data, &mod, ®op, &rm); |
1435 AppendToBuffer("cvtss2sd %s,", NameOfXMMRegister(regop)); | 1455 AppendToBuffer("cvtss2sd %s,", NameOfXMMRegister(regop)); |
1436 data += PrintRightXMMOperand(data); | 1456 data += PrintRightXMMOperand(data); |
1437 } else if (*(data+2) == 0x6F) { | 1457 } else if (b2 == 0x6F) { |
1438 data += 3; | 1458 data += 3; |
1439 int mod, regop, rm; | 1459 int mod, regop, rm; |
1440 get_modrm(*data, &mod, ®op, &rm); | 1460 get_modrm(*data, &mod, ®op, &rm); |
1441 AppendToBuffer("movdqu %s,", NameOfXMMRegister(regop)); | 1461 AppendToBuffer("movdqu %s,", NameOfXMMRegister(regop)); |
1442 data += PrintRightXMMOperand(data); | 1462 data += PrintRightXMMOperand(data); |
1443 } else if (*(data+2) == 0x7F) { | 1463 } else if (b2 == 0x7F) { |
1444 AppendToBuffer("movdqu "); | 1464 AppendToBuffer("movdqu "); |
1445 data += 3; | 1465 data += 3; |
1446 int mod, regop, rm; | 1466 int mod, regop, rm; |
1447 get_modrm(*data, &mod, ®op, &rm); | 1467 get_modrm(*data, &mod, ®op, &rm); |
1448 data += PrintRightXMMOperand(data); | 1468 data += PrintRightXMMOperand(data); |
1449 AppendToBuffer(",%s", NameOfXMMRegister(regop)); | 1469 AppendToBuffer(",%s", NameOfXMMRegister(regop)); |
1450 } else { | 1470 } else { |
1451 UnimplementedInstruction(); | 1471 UnimplementedInstruction(); |
1452 } | 1472 } |
1453 } else if (*(data+1) == 0xA5) { | 1473 } else if (*(data+1) == 0xA5) { |
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1591 fprintf(f, " "); | 1611 fprintf(f, " "); |
1592 } | 1612 } |
1593 fprintf(f, " %s\n", buffer.start()); | 1613 fprintf(f, " %s\n", buffer.start()); |
1594 } | 1614 } |
1595 } | 1615 } |
1596 | 1616 |
1597 | 1617 |
1598 } // namespace disasm | 1618 } // namespace disasm |
1599 | 1619 |
1600 #endif // V8_TARGET_ARCH_IA32 | 1620 #endif // V8_TARGET_ARCH_IA32 |
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