Index: src/arm/simulator-arm.cc |
=================================================================== |
--- src/arm/simulator-arm.cc (revision 7157) |
+++ src/arm/simulator-arm.cc (working copy) |
@@ -2467,6 +2467,8 @@ |
// vmov :Rt = Sn |
// vcvt: Dd = Sm |
// vcvt: Sd = Dm |
+// Dd = vabs(Dm) |
+// Dd = vneg(Dm) |
// Dd = vadd(Dn, Dm) |
// Dd = vsub(Dn, Dm) |
// Dd = vmul(Dn, Dm) |
@@ -2502,6 +2504,11 @@ |
double dm_value = get_double_from_d_register(vm); |
double dd_value = fabs(dm_value); |
set_d_register_from_double(vd, dd_value); |
+ } else if ((instr->Opc2Value() == 0x1) && (instr->Opc3Value() == 0x1)) { |
+ // vneg |
+ double dm_value = get_double_from_d_register(vm); |
+ double dd_value = -dm_value; |
+ set_d_register_from_double(vd, dd_value); |
} else if ((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3)) { |
DecodeVCVTBetweenDoubleAndSingle(instr); |
} else if ((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) { |