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Side by Side Diff: src/arm/assembler-arm.h

Issue 6625084: ARM: Improved double to integer truncation.... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 9 years, 9 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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985 const Condition cond = al); 985 const Condition cond = al);
986 void vcvt_f64_f32(const DwVfpRegister dst, 986 void vcvt_f64_f32(const DwVfpRegister dst,
987 const SwVfpRegister src, 987 const SwVfpRegister src,
988 VFPConversionMode mode = kDefaultRoundToZero, 988 VFPConversionMode mode = kDefaultRoundToZero,
989 const Condition cond = al); 989 const Condition cond = al);
990 void vcvt_f32_f64(const SwVfpRegister dst, 990 void vcvt_f32_f64(const SwVfpRegister dst,
991 const DwVfpRegister src, 991 const DwVfpRegister src,
992 VFPConversionMode mode = kDefaultRoundToZero, 992 VFPConversionMode mode = kDefaultRoundToZero,
993 const Condition cond = al); 993 const Condition cond = al);
994 994
995 void vneg(const DwVfpRegister dst,
996 const DwVfpRegister src,
997 const Condition cond = al);
995 void vabs(const DwVfpRegister dst, 998 void vabs(const DwVfpRegister dst,
996 const DwVfpRegister src, 999 const DwVfpRegister src,
997 const Condition cond = al); 1000 const Condition cond = al);
998 void vadd(const DwVfpRegister dst, 1001 void vadd(const DwVfpRegister dst,
999 const DwVfpRegister src1, 1002 const DwVfpRegister src1,
1000 const DwVfpRegister src2, 1003 const DwVfpRegister src2,
1001 const Condition cond = al); 1004 const Condition cond = al);
1002 void vsub(const DwVfpRegister dst, 1005 void vsub(const DwVfpRegister dst,
1003 const DwVfpRegister src1, 1006 const DwVfpRegister src1,
1004 const DwVfpRegister src2, 1007 const DwVfpRegister src2,
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1288 public: 1291 public:
1289 explicit EnsureSpace(Assembler* assembler) { 1292 explicit EnsureSpace(Assembler* assembler) {
1290 assembler->CheckBuffer(); 1293 assembler->CheckBuffer();
1291 } 1294 }
1292 }; 1295 };
1293 1296
1294 1297
1295 } } // namespace v8::internal 1298 } } // namespace v8::internal
1296 1299
1297 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1300 #endif // V8_ARM_ASSEMBLER_ARM_H_
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