CHROMIUM: ARM: tegra: Add pll_d table entries for 252MHz

arch/arm/mach-tegra/tegra2_clocks.c

 /*
 * arch/arm/mach-tegra/tegra2_clocks.c
  *
  * Copyright (C) 2010 Google, Inc.
  *
  * Author:
  *      Colin Cross <ccross@google.com>
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ skipping 1595 matching lines @@
         .reg_shift = 0,
         .max_rate  = 73728000,
 };
 
 static struct clk_pll_freq_table tegra_pll_d_freq_table[] = {
         { 12000000, 216000000, 216, 12, 1, 4},
         { 13000000, 216000000, 216, 13, 1, 4},
         { 19200000, 216000000, 135, 12, 1, 3},
         { 26000000, 216000000, 216, 26, 1, 4},
 
+        { 12000000, 252000000, 252, 12, 1, 4},
+        { 13000000, 252000000, 252, 13, 1, 4},
+        { 19200000, 252000000, 210, 16, 1, 3},
+        { 26000000, 252000000, 252, 26, 1, 4},
+
         { 12000000, 594000000, 594, 12, 1, 8},
         { 13000000, 594000000, 594, 13, 1, 8},
         { 19200000, 594000000, 495, 16, 1, 8},
         { 26000000, 594000000, 594, 26, 1, 8},
 
         { 12000000, 1000000000, 1000, 12, 1, 12},
         { 13000000, 1000000000, 1000, 13, 1, 12},
         { 19200000, 1000000000, 625,  12, 1, 8},
         { 26000000, 1000000000, 1000, 26, 1, 12},
 
@@ skipping 781 matching lines @@
 
         off = CLK_OUT_ENB;
         for (i = 0; i < CLK_OUT_ENB_NUM; i++, off += 4)
                 clk_writel(*ctx++, off);
         wmb();
 
         clk_writel(*ctx++, MISC_CLK_ENB);
         clk_writel(*ctx++, CLK_MASK_ARM);
 }
 #endif