| OLD | NEW |
| 1 /* | 1 /* |
| 2 * (C) Copyright 2010 | 2 * (C) Copyright 2010 |
| 3 * NVIDIA Corporation <www.nvidia.com> | 3 * NVIDIA Corporation <www.nvidia.com> |
| 4 * | 4 * |
| 5 * See file CREDITS for list of people who contributed to this | 5 * See file CREDITS for list of people who contributed to this |
| 6 * project. | 6 * project. |
| 7 * | 7 * |
| 8 * This program is free software; you can redistribute it and/or | 8 * This program is free software; you can redistribute it and/or |
| 9 * modify it under the terms of the GNU General Public License as | 9 * modify it under the terms of the GNU General Public License as |
| 10 * published by the Free Software Foundation; either version 2 of | 10 * published by the Free Software Foundation; either version 2 of |
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| 168 | 168 |
| 169 #define CONFIG_TEGRA2_NAND_HYNIX_HY27UF4G2B 1 |
| 170 /* Set clock divisor |
| 171 * 7 bits of D and 1 bit of H |
| 172 * divisor= (DDDDDDD + 1) + (H x 0.5) |
| 173 * clock = original clock / divisor |
| 174 * 6 means /4 */ |
| 175 #define CONFIG_NAND_CLK_DIVISOR_DDDDDDDH 6 |
| 176 |
| 169 #define CONFIG_TEGRA2_PINMUX CONFIG_TEGRA2_PINMUX_DISPLAY_SEABOARD | 177 #define CONFIG_TEGRA2_PINMUX CONFIG_TEGRA2_PINMUX_DISPLAY_SEABOARD |
| 170 | 178 |
| 171 #define TEGRA_GPIO_INIT_LCD TEGRA_GPIO_INIT_LCD_SEABOARD | 179 #define TEGRA_GPIO_INIT_LCD TEGRA_GPIO_INIT_LCD_SEABOARD |
| 172 #define TEGRA_CLOCK_INIT_LCD TEGRA_CLOCK_INIT_LCD_SEABOARD | 180 #define TEGRA_CLOCK_INIT_LCD TEGRA_CLOCK_INIT_LCD_SEABOARD |
| 173 #define TEGRA_RESOURCE_LCD TEGRA_RESOURCE_LCD_SEABOARD | 181 #define TEGRA_RESOURCE_LCD TEGRA_RESOURCE_LCD_SEABOARD |
| 174 #define TEGRA_PANEL_MODE TEGRA_PANEL_MODE_SEABOARD | 182 #define TEGRA_PANEL_MODE TEGRA_PANEL_MODE_SEABOARD |
| 175 | |
| 176 #endif /* __CONFIG_H */ | 183 #endif /* __CONFIG_H */ |
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