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1 // Copyright 2010 the V8 project authors. All rights reserved. | 1 // Copyright 2010 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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108 nop(); | 108 nop(); |
109 } | 109 } |
110 | 110 |
111 // Load an object from the root table. | 111 // Load an object from the root table. |
112 void LoadRoot(Register destination, | 112 void LoadRoot(Register destination, |
113 Heap::RootListIndex index); | 113 Heap::RootListIndex index); |
114 void LoadRoot(Register destination, | 114 void LoadRoot(Register destination, |
115 Heap::RootListIndex index, | 115 Heap::RootListIndex index, |
116 Condition cond, Register src1, const Operand& src2); | 116 Condition cond, Register src1, const Operand& src2); |
117 | 117 |
118 // Sets the remembered set bit for [address+offset], where address is the | 118 // Sets the remembered set bit for [address+offset]. |
119 // address of the heap object 'object'. The address must be in the first 8K | |
120 // of an allocated page. The 'scratch' register is used in the | |
121 // implementation and all 3 registers are clobbered by the operation, as | |
122 // well as the ip register. | |
123 void RecordWrite(Register object, Register offset, Register scratch); | 119 void RecordWrite(Register object, Register offset, Register scratch); |
124 | 120 |
125 | 121 |
126 // --------------------------------------------------------------------------- | 122 // --------------------------------------------------------------------------- |
127 // Instruction macros | 123 // Instruction macros |
128 | 124 |
129 #define DEFINE_INSTRUCTION(instr) \ | 125 #define DEFINE_INSTRUCTION(instr) \ |
130 void instr(Register rd, Register rs, const Operand& rt); \ | 126 void instr(Register rd, Register rs, const Operand& rt); \ |
131 void instr(Register rd, Register rs, Register rt) { \ | 127 void instr(Register rd, Register rs, Register rt) { \ |
132 instr(rd, rs, Operand(rt)); \ | 128 instr(rd, rs, Operand(rt)); \ |
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175 void li(Register rd, Operand j, bool gen2instr = false); | 171 void li(Register rd, Operand j, bool gen2instr = false); |
176 inline void li(Register rd, int32_t j, bool gen2instr = false) { | 172 inline void li(Register rd, int32_t j, bool gen2instr = false) { |
177 li(rd, Operand(j), gen2instr); | 173 li(rd, Operand(j), gen2instr); |
178 } | 174 } |
179 | 175 |
180 // Exception-generating instructions and debugging support | 176 // Exception-generating instructions and debugging support |
181 void stop(const char* msg); | 177 void stop(const char* msg); |
182 | 178 |
183 | 179 |
184 // Push multiple registers on the stack. | 180 // Push multiple registers on the stack. |
185 // With MultiPush, lower registers are pushed first on the stack. | 181 // Registers are saved in numerical order, with higher numbered registers |
186 // For example if you push t0, t1, s0, and ra you get: | 182 // saved in higher memory addresses |
187 // | | | |
188 // |-----------------------| | |
189 // | t0 | + | |
190 // |-----------------------| | | |
191 // | t1 | | | |
192 // |-----------------------| | | |
193 // | s0 | v | |
194 // |-----------------------| - | |
195 // | ra | | |
196 // |-----------------------| | |
197 // | | | |
198 void MultiPush(RegList regs); | 183 void MultiPush(RegList regs); |
199 void MultiPushReversed(RegList regs); | 184 void MultiPushReversed(RegList regs); |
200 void Push(Register src) { | 185 void Push(Register src) { |
201 Addu(sp, sp, Operand(-kPointerSize)); | 186 Addu(sp, sp, Operand(-kPointerSize)); |
202 sw(src, MemOperand(sp, 0)); | 187 sw(src, MemOperand(sp, 0)); |
203 } | 188 } |
204 inline void push(Register src) { Push(src); } | 189 inline void push(Register src) { Push(src); } |
205 | 190 |
206 void Push(Register src, Condition cond, Register tst1, Register tst2) { | 191 void Push(Register src, Condition cond, Register tst1, Register tst2) { |
207 // Since we don't have conditionnal execution we use a Branch. | 192 // Since we don't have conditionnal execution we use a Branch. |
208 Branch(cond, 3, tst1, Operand(tst2)); | 193 Branch(cond, 3, tst1, Operand(tst2)); |
209 nop(); | 194 nop(); |
210 Addu(sp, sp, Operand(-kPointerSize)); | 195 Addu(sp, sp, Operand(-kPointerSize)); |
211 sw(src, MemOperand(sp, 0)); | 196 sw(src, MemOperand(sp, 0)); |
212 } | 197 } |
213 | 198 |
214 // Pops multiple values from the stack and load them in the | 199 // Pops multiple values from the stack and load them in the |
215 // registers specified in regs. Pop order is the opposite as in MultiPush. | 200 // registers specified in regs. Pop order is the opposite as in MultiPush. |
216 void MultiPop(RegList regs); | 201 void MultiPop(RegList regs); |
217 void MultiPopReversed(RegList regs); | 202 void MultiPopReversed(RegList regs); |
218 void Pop(Register dst) { | 203 void Pop(Register dst) { |
219 lw(dst, MemOperand(sp, 0)); | 204 lw(dst, MemOperand(sp, 0)); |
220 Addu(sp, sp, Operand(kPointerSize)); | 205 Addu(sp, sp, Operand(kPointerSize)); |
221 } | 206 } |
222 void Pop() { | 207 void Pop() { |
223 Add(sp, sp, Operand(kPointerSize)); | 208 Add(sp, sp, Operand(kPointerSize)); |
224 } | 209 } |
225 | 210 |
226 | 211 |
| 212 #ifdef ENABLE_DEBUGGER_SUPPORT |
| 213 // --------------------------------------------------------------------------- |
| 214 // Debugger Support |
| 215 |
| 216 void SaveRegistersToMemory(RegList regs); |
| 217 void RestoreRegistersFromMemory(RegList regs); |
| 218 void CopyRegistersFromMemoryToStack(Register base, RegList regs); |
| 219 void CopyRegistersFromStackToMemory(Register base, |
| 220 Register scratch, |
| 221 RegList regs); |
| 222 void DebugBreak(); |
| 223 #endif |
| 224 |
| 225 |
227 // --------------------------------------------------------------------------- | 226 // --------------------------------------------------------------------------- |
228 // Exception handling | 227 // Exception handling |
229 | 228 |
230 // Push a new try handler and link into try handler chain. | 229 // Push a new try handler and link into try handler chain. |
231 // The return address must be passed in register lr. | 230 // The return address must be passed in register lr. |
232 // On exit, r0 contains TOS (code slot). | 231 // On exit, r0 contains TOS (code slot). |
233 void PushTryHandler(CodeLocation try_location, HandlerType type); | 232 void PushTryHandler(CodeLocation try_location, HandlerType type); |
234 | 233 |
235 // Unlink the stack handler on top of the stack from the try handler chain. | 234 // Unlink the stack handler on top of the stack from the try handler chain. |
236 // Must preserve the result register. | 235 // Must preserve the result register. |
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376 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) | 375 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) |
377 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> | 376 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> |
378 #else | 377 #else |
379 #define ACCESS_MASM(masm) masm-> | 378 #define ACCESS_MASM(masm) masm-> |
380 #endif | 379 #endif |
381 | 380 |
382 } } // namespace v8::internal | 381 } } // namespace v8::internal |
383 | 382 |
384 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ | 383 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ |
385 | 384 |
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