Support for MIPS architecture.

src/mips/macro-assembler-mips.cc

 // Copyright 2010 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 404 matching lines @@
   }
   addiu(sp, sp, 4 * NumSaved);
 }
 
 
 // Emulated condtional branches do not emit a nop in the branch delay slot.
 
 // Trashes the at register if no scratch register is provided.
 void MacroAssembler::Branch(Condition cond, int16_t offset, Register rs,
                             const Operand& rt, Register scratch) {
-  Register r2;
+  Register r2 = no_reg;
   if (rt.is_reg()) {
     // We don't want any other register but scratch clobbered.
     ASSERT(!scratch.is(rs) && !scratch.is(rt.rm_));
     r2 = rt.rm_;
   } else if (cond != cc_always) {
     // We don't want any other register but scratch clobbered.
     ASSERT(!scratch.is(rs));
     r2 = scratch;
     li(r2, rt);
   }
@@ skipping 46 matching lines @@
       break;
 
     default:
       UNREACHABLE();
   }
 }
 
 
 void MacroAssembler::Branch(Condition cond,  Label* L, Register rs,
                             const Operand& rt, Register scratch) {
-  Register r2;
+  Register r2 = no_reg;
   if (rt.is_reg()) {
     r2 = rt.rm_;
   } else if (cond != cc_always) {
     r2 = scratch;
     li(r2, rt);
   }
 
   // We use branch_offset as an argument for the branch instructions to be sure
   // it is called just before generating the branch instruction, as needed.
 
@@ skipping 49 matching lines @@
   }
 }
 
 
 // Trashes the at register if no scratch register is provided.
 // We need to use a bgezal or bltzal, but they can't be used directly with the
 // slt instructions. We could use sub or add instead but we would miss overflow
 // cases, so we keep slt and add an intermediate third instruction.
 void MacroAssembler::BranchAndLink(Condition cond, int16_t offset, Register rs,
                                    const Operand& rt, Register scratch) {
-  Register r2;
+  Register r2 = no_reg;
   if (rt.is_reg()) {
     r2 = rt.rm_;
   } else if (cond != cc_always) {
     r2 = scratch;
     li(r2, rt);
   }
 
   switch (cond) {
     case cc_always:
       bal(offset);
@@ skipping 54 matching lines @@
       break;
 
     default:
       UNREACHABLE();
   }
 }
 
 
 void MacroAssembler::BranchAndLink(Condition cond, Label* L, Register rs,
                                    const Operand& rt, Register scratch) {
-  Register r2;
+  Register r2 = no_reg;
   if (rt.is_reg()) {
     r2 = rt.rm_;
   } else if (cond != cc_always) {
     r2 = scratch;
     li(r2, rt);
   }
 
   switch (cond) {
     case cc_always:
       bal(shifted_branch_offset(L, false));
@@ skipping 132 matching lines @@
 void MacroAssembler::Drop(int count, Condition cond) {
   UNIMPLEMENTED_MIPS();
 }
 
 
 void MacroAssembler::Call(Label* target) {
   UNIMPLEMENTED_MIPS();
 }
 
 
+#ifdef ENABLE_DEBUGGER_SUPPORT
+  // ---------------------------------------------------------------------------
+  // Debugger Support
+
+  void MacroAssembler::DebugBreak() {
+    UNIMPLEMENTED_MIPS();
+  }
+#endif
+
+
 // ---------------------------------------------------------------------------
 // Exception handling
 
 void MacroAssembler::PushTryHandler(CodeLocation try_location,
                                     HandlerType type) {
   UNIMPLEMENTED_MIPS();
 }
 
 
 void MacroAssembler::PopTryHandler() {
@@ skipping 93 matching lines @@
   UNIMPLEMENTED_MIPS();
 }
 
 
 void MacroAssembler::Abort(const char* msg) {
   UNIMPLEMENTED_MIPS();
 }
 
 } }  // namespace v8::internal