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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 277 const SwVfpRegister s23 = { 23 }; | 277 const SwVfpRegister s23 = { 23 }; |
| 278 const SwVfpRegister s24 = { 24 }; | 278 const SwVfpRegister s24 = { 24 }; |
| 279 const SwVfpRegister s25 = { 25 }; | 279 const SwVfpRegister s25 = { 25 }; |
| 280 const SwVfpRegister s26 = { 26 }; | 280 const SwVfpRegister s26 = { 26 }; |
| 281 const SwVfpRegister s27 = { 27 }; | 281 const SwVfpRegister s27 = { 27 }; |
| 282 const SwVfpRegister s28 = { 28 }; | 282 const SwVfpRegister s28 = { 28 }; |
| 283 const SwVfpRegister s29 = { 29 }; | 283 const SwVfpRegister s29 = { 29 }; |
| 284 const SwVfpRegister s30 = { 30 }; | 284 const SwVfpRegister s30 = { 30 }; |
| 285 const SwVfpRegister s31 = { 31 }; | 285 const SwVfpRegister s31 = { 31 }; |
| 286 | 286 |
| 287 const DwVfpRegister no_dreg = { -1 }; |
| 287 const DwVfpRegister d0 = { 0 }; | 288 const DwVfpRegister d0 = { 0 }; |
| 288 const DwVfpRegister d1 = { 1 }; | 289 const DwVfpRegister d1 = { 1 }; |
| 289 const DwVfpRegister d2 = { 2 }; | 290 const DwVfpRegister d2 = { 2 }; |
| 290 const DwVfpRegister d3 = { 3 }; | 291 const DwVfpRegister d3 = { 3 }; |
| 291 const DwVfpRegister d4 = { 4 }; | 292 const DwVfpRegister d4 = { 4 }; |
| 292 const DwVfpRegister d5 = { 5 }; | 293 const DwVfpRegister d5 = { 5 }; |
| 293 const DwVfpRegister d6 = { 6 }; | 294 const DwVfpRegister d6 = { 6 }; |
| 294 const DwVfpRegister d7 = { 7 }; | 295 const DwVfpRegister d7 = { 7 }; |
| 295 const DwVfpRegister d8 = { 8 }; | 296 const DwVfpRegister d8 = { 8 }; |
| 296 const DwVfpRegister d9 = { 9 }; | 297 const DwVfpRegister d9 = { 9 }; |
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| 1284 public: | 1285 public: |
| 1285 explicit EnsureSpace(Assembler* assembler) { | 1286 explicit EnsureSpace(Assembler* assembler) { |
| 1286 assembler->CheckBuffer(); | 1287 assembler->CheckBuffer(); |
| 1287 } | 1288 } |
| 1288 }; | 1289 }; |
| 1289 | 1290 |
| 1290 | 1291 |
| 1291 } } // namespace v8::internal | 1292 } } // namespace v8::internal |
| 1292 | 1293 |
| 1293 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1294 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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