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Side by Side Diff: sound/soc/codecs/wm8903.h

Issue 6577007: CHROMIUM: ASoC: Import entire upstream ASoC tree (Closed)
Patch Set: Created 9 years, 10 months ago
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1 /* 1 /*
2 * wm8903.h - WM8903 audio codec interface 2 * wm8903.h - WM8903 audio codec interface
3 * 3 *
4 * Copyright 2008 Wolfson Microelectronics PLC. 4 * Copyright 2008 Wolfson Microelectronics PLC.
5 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 5 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the 8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your 9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13 #ifndef _WM8903_H 13 #ifndef _WM8903_H
14 #define _WM8903_H 14 #define _WM8903_H
15 15
16 #include <linux/i2c.h> 16 #include <linux/i2c.h>
17 17
18 extern int wm8903_mic_detect(struct snd_soc_codec *codec, 18 extern int wm8903_mic_detect(struct snd_soc_codec *codec,
19 struct snd_soc_jack *jack, 19 struct snd_soc_jack *jack,
20 int det, int shrt); 20 int det, int shrt);
21 21
22 #define WM8903_MCLK_DIV_2 1
23 #define WM8903_CLK_SYS 2
24 #define WM8903_BCLK 3
25 #define WM8903_LRCLK 4
26 22
27 /* 23 /*
28 * Register values. 24 * Register values.
29 */ 25 */
30 #define WM8903_SW_RESET_AND_ID 0x00 26 #define WM8903_SW_RESET_AND_ID 0x00
31 #define WM8903_REVISION_NUMBER 0x01 27 #define WM8903_REVISION_NUMBER 0x01
32 #define WM8903_BIAS_CONTROL_0 0x04 28 #define WM8903_BIAS_CONTROL_0 0x04
33 #define WM8903_VMID_CONTROL_0 0x05 29 #define WM8903_VMID_CONTROL_0 0x05
34 #define WM8903_MIC_BIAS_CONTROL_0 0x06 30 #define WM8903_MIC_BIAS_CONTROL_0 0x06
35 #define WM8903_ANALOGUE_DAC_0 0x08 31 #define WM8903_ANALOGUE_DAC_0 0x08
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72 #define WM8903_ANALOGUE_SPK_MIX_RIGHT_1 0x37 68 #define WM8903_ANALOGUE_SPK_MIX_RIGHT_1 0x37
73 #define WM8903_ANALOGUE_OUT1_LEFT 0x39 69 #define WM8903_ANALOGUE_OUT1_LEFT 0x39
74 #define WM8903_ANALOGUE_OUT1_RIGHT 0x3A 70 #define WM8903_ANALOGUE_OUT1_RIGHT 0x3A
75 #define WM8903_ANALOGUE_OUT2_LEFT 0x3B 71 #define WM8903_ANALOGUE_OUT2_LEFT 0x3B
76 #define WM8903_ANALOGUE_OUT2_RIGHT 0x3C 72 #define WM8903_ANALOGUE_OUT2_RIGHT 0x3C
77 #define WM8903_ANALOGUE_OUT3_LEFT 0x3E 73 #define WM8903_ANALOGUE_OUT3_LEFT 0x3E
78 #define WM8903_ANALOGUE_OUT3_RIGHT 0x3F 74 #define WM8903_ANALOGUE_OUT3_RIGHT 0x3F
79 #define WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0 0x41 75 #define WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0 0x41
80 #define WM8903_DC_SERVO_0 0x43 76 #define WM8903_DC_SERVO_0 0x43
81 #define WM8903_DC_SERVO_2 0x45 77 #define WM8903_DC_SERVO_2 0x45
78 #define WM8903_DC_SERVO_4 0x47
79 #define WM8903_DC_SERVO_5 0x48
80 #define WM8903_DC_SERVO_6 0x49
81 #define WM8903_DC_SERVO_7 0x4A
82 #define WM8903_DC_SERVO_READBACK_1 0x51
83 #define WM8903_DC_SERVO_READBACK_2 0x52
84 #define WM8903_DC_SERVO_READBACK_3 0x53
85 #define WM8903_DC_SERVO_READBACK_4 0x54
82 #define WM8903_ANALOGUE_HP_0 0x5A 86 #define WM8903_ANALOGUE_HP_0 0x5A
83 #define WM8903_ANALOGUE_LINEOUT_0 0x5E 87 #define WM8903_ANALOGUE_LINEOUT_0 0x5E
84 #define WM8903_CHARGE_PUMP_0 0x62 88 #define WM8903_CHARGE_PUMP_0 0x62
85 #define WM8903_CLASS_W_0 0x68 89 #define WM8903_CLASS_W_0 0x68
86 #define WM8903_WRITE_SEQUENCER_0 0x6C 90 #define WM8903_WRITE_SEQUENCER_0 0x6C
87 #define WM8903_WRITE_SEQUENCER_1 0x6D 91 #define WM8903_WRITE_SEQUENCER_1 0x6D
88 #define WM8903_WRITE_SEQUENCER_2 0x6E 92 #define WM8903_WRITE_SEQUENCER_2 0x6E
89 #define WM8903_WRITE_SEQUENCER_3 0x6F 93 #define WM8903_WRITE_SEQUENCER_3 0x6F
90 #define WM8903_WRITE_SEQUENCER_4 0x70 94 #define WM8903_WRITE_SEQUENCER_4 0x70
91 #define WM8903_CONTROL_INTERFACE 0x72 95 #define WM8903_CONTROL_INTERFACE 0x72
92 #define WM8903_GPIO_CONTROL_1 0x74 96 #define WM8903_GPIO_CONTROL_1 0x74
93 #define WM8903_GPIO_CONTROL_2 0x75 97 #define WM8903_GPIO_CONTROL_2 0x75
94 #define WM8903_GPIO_CONTROL_3 0x76 98 #define WM8903_GPIO_CONTROL_3 0x76
95 #define WM8903_GPIO_CONTROL_4 0x77 99 #define WM8903_GPIO_CONTROL_4 0x77
96 #define WM8903_GPIO_CONTROL_5 0x78 100 #define WM8903_GPIO_CONTROL_5 0x78
97 #define WM8903_INTERRUPT_STATUS_1 0x79 101 #define WM8903_INTERRUPT_STATUS_1 0x79
98 #define WM8903_INTERRUPT_STATUS_1_MASK 0x7A 102 #define WM8903_INTERRUPT_STATUS_1_MASK 0x7A
99 #define WM8903_INTERRUPT_POLARITY_1 0x7B 103 #define WM8903_INTERRUPT_POLARITY_1 0x7B
100 #define WM8903_INTERRUPT_CONTROL 0x7E 104 #define WM8903_INTERRUPT_CONTROL 0x7E
101 #define WM8903_CONTROL_INTERFACE_TEST_1 0x81
102 #define WM8903_CHARGE_PUMP_TEST_1 0x95
103 #define WM8903_CLOCK_RATE_TEST_4 0xA4 105 #define WM8903_CLOCK_RATE_TEST_4 0xA4
104 #define WM8903_ANALOGUE_OUTPUT_BIAS_0 0xAC 106 #define WM8903_ANALOGUE_OUTPUT_BIAS_0 0xAC
105 107
106 #define WM8903_REGISTER_COUNT 75 108 #define WM8903_REGISTER_COUNT 75
107 #define WM8903_MAX_REGISTER 0xAC 109 #define WM8903_MAX_REGISTER 0xAC
108 110
109 /* 111 /*
110 * Field Definitions. 112 * Field Definitions.
111 */ 113 */
112 114
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1199 1201
1200 /* 1202 /*
1201 * R126 (0x7E) - Interrupt Control 1203 * R126 (0x7E) - Interrupt Control
1202 */ 1204 */
1203 #define WM8903_IRQ_POL 0x0001 /* IRQ_POL */ 1205 #define WM8903_IRQ_POL 0x0001 /* IRQ_POL */
1204 #define WM8903_IRQ_POL_MASK 0x0001 /* IRQ_POL */ 1206 #define WM8903_IRQ_POL_MASK 0x0001 /* IRQ_POL */
1205 #define WM8903_IRQ_POL_SHIFT 0 /* IRQ_POL */ 1207 #define WM8903_IRQ_POL_SHIFT 0 /* IRQ_POL */
1206 #define WM8903_IRQ_POL_WIDTH 1 /* IRQ_POL */ 1208 #define WM8903_IRQ_POL_WIDTH 1 /* IRQ_POL */
1207 1209
1208 /* 1210 /*
1209 * R129 (0x81) - Control Interface Test 1
1210 */
1211 #define WM8903_USER_KEY 0x0002 /* USER_KEY */
1212 #define WM8903_USER_KEY_MASK 0x0002 /* USER_KEY */
1213 #define WM8903_USER_KEY_SHIFT 1 /* USER_KEY */
1214 #define WM8903_USER_KEY_WIDTH 1 /* USER_KEY */
1215 #define WM8903_TEST_KEY 0x0001 /* TEST_KEY */
1216 #define WM8903_TEST_KEY_MASK 0x0001 /* TEST_KEY */
1217 #define WM8903_TEST_KEY_SHIFT 0 /* TEST_KEY */
1218 #define WM8903_TEST_KEY_WIDTH 1 /* TEST_KEY */
1219
1220 /*
1221 * R149 (0x95) - Charge Pump Test 1
1222 */
1223 #define WM8903_CP_SW_KELVIN_MODE_MASK 0x0006 /* CP_SW_KELVIN_MODE - [ 2:1] */
1224 #define WM8903_CP_SW_KELVIN_MODE_SHIFT 1 /* CP_SW_KELVIN_MODE - [ 2:1] */
1225 #define WM8903_CP_SW_KELVIN_MODE_WIDTH 2 /* CP_SW_KELVIN_MODE - [ 2:1] */
1226
1227 /*
1228 * R164 (0xA4) - Clock Rate Test 4 1211 * R164 (0xA4) - Clock Rate Test 4
1229 */ 1212 */
1230 #define WM8903_ADC_DIG_MIC 0x0200 /* ADC_DIG_MIC */ 1213 #define WM8903_ADC_DIG_MIC 0x0200 /* ADC_DIG_MIC */
1231 #define WM8903_ADC_DIG_MIC_MASK 0x0200 /* ADC_DIG_MIC */ 1214 #define WM8903_ADC_DIG_MIC_MASK 0x0200 /* ADC_DIG_MIC */
1232 #define WM8903_ADC_DIG_MIC_SHIFT 9 /* ADC_DIG_MIC */ 1215 #define WM8903_ADC_DIG_MIC_SHIFT 9 /* ADC_DIG_MIC */
1233 #define WM8903_ADC_DIG_MIC_WIDTH 1 /* ADC_DIG_MIC */ 1216 #define WM8903_ADC_DIG_MIC_WIDTH 1 /* ADC_DIG_MIC */
1234 1217
1235 /* 1218 /*
1236 * R172 (0xAC) - Analogue Output Bias 0 1219 * R172 (0xAC) - Analogue Output Bias 0
1237 */ 1220 */
1238 #define WM8903_PGA_BIAS_MASK 0x0070 /* PGA_BIAS - [6:4] */ 1221 #define WM8903_PGA_BIAS_MASK 0x0070 /* PGA_BIAS - [6:4] */
1239 #define WM8903_PGA_BIAS_SHIFT 4 /* PGA_BIAS - [6:4] */ 1222 #define WM8903_PGA_BIAS_SHIFT 4 /* PGA_BIAS - [6:4] */
1240 #define WM8903_PGA_BIAS_WIDTH 3 /* PGA_BIAS - [6:4] */ 1223 #define WM8903_PGA_BIAS_WIDTH 3 /* PGA_BIAS - [6:4] */
1241 1224
1242 #endif 1225 #endif
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