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Side by Side Diff: sound/soc/codecs/tlv320dac33.c

Issue 6577007: CHROMIUM: ASoC: Import entire upstream ASoC tree (Closed)
Patch Set: Created 9 years, 10 months ago
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1 /* 1 /*
2 * ALSA SoC Texas Instruments TLV320DAC33 codec driver 2 * ALSA SoC Texas Instruments TLV320DAC33 codec driver
3 * 3 *
4 * Author: Peter Ujfalusi <peter.ujfalusi@nokia.com> 4 * Author: Peter Ujfalusi <peter.ujfalusi@nokia.com>
5 * 5 *
6 * Copyright: (C) 2009 Nokia Corporation 6 * Copyright: (C) 2009 Nokia Corporation
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
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29 #include <linux/i2c.h> 29 #include <linux/i2c.h>
30 #include <linux/platform_device.h> 30 #include <linux/platform_device.h>
31 #include <linux/interrupt.h> 31 #include <linux/interrupt.h>
32 #include <linux/gpio.h> 32 #include <linux/gpio.h>
33 #include <linux/regulator/consumer.h> 33 #include <linux/regulator/consumer.h>
34 #include <linux/slab.h> 34 #include <linux/slab.h>
35 #include <sound/core.h> 35 #include <sound/core.h>
36 #include <sound/pcm.h> 36 #include <sound/pcm.h>
37 #include <sound/pcm_params.h> 37 #include <sound/pcm_params.h>
38 #include <sound/soc.h> 38 #include <sound/soc.h>
39 #include <sound/soc-dapm.h>
40 #include <sound/initval.h> 39 #include <sound/initval.h>
41 #include <sound/tlv.h> 40 #include <sound/tlv.h>
42 41
43 #include <sound/tlv320dac33-plat.h> 42 #include <sound/tlv320dac33-plat.h>
44 #include "tlv320dac33.h" 43 #include "tlv320dac33.h"
45 44
46 #define DAC33_BUFFER_SIZE_BYTES»» 24576» /* bytes, 12288 16 bit words, 45 /*
47 » » » » » » * 6144 stereo */ 46 * The internal FIFO is 24576 bytes long
48 #define DAC33_BUFFER_SIZE_SAMPLES» 6144 47 * It can be configured to hold 16bit or 24bit samples
49 48 * In 16bit configuration the FIFO can hold 6144 stereo samples
50 #define NSAMPLE_MAX» » 5700 49 * In 24bit configuration the FIFO can hold 4096 stereo samples
51 50 */
52 #define MODE7_LTHR» » 10 51 #define DAC33_FIFO_SIZE_16BIT» 6144
53 #define MODE7_UTHR» » (DAC33_BUFFER_SIZE_SAMPLES - 10) 52 #define DAC33_FIFO_SIZE_24BIT» 4096
53 #define DAC33_MODE7_MARGIN» 10» /* Safety margin for FIFO in Mode7 */
54 54
55 #define BURST_BASEFREQ_HZ 49152000 55 #define BURST_BASEFREQ_HZ 49152000
56 56
57 #define SAMPLES_TO_US(rate, samples) \ 57 #define SAMPLES_TO_US(rate, samples) \
58 (1000000000 / ((rate * 1000) / samples)) 58 (1000000000 / ((rate * 1000) / samples))
59 59
60 #define US_TO_SAMPLES(rate, us) \ 60 #define US_TO_SAMPLES(rate, us) \
61 (rate / (1000000 / (us < 1000000 ? us : 1000000))) 61 (rate / (1000000 / (us < 1000000 ? us : 1000000)))
62 62
63 #define UTHR_FROM_PERIOD_SIZE(samples, playrate, burstrate) \ 63 #define UTHR_FROM_PERIOD_SIZE(samples, playrate, burstrate) \
(...skipping 29 matching lines...) Expand all
93 struct work_struct work; 93 struct work_struct work;
94 struct snd_soc_codec *codec; 94 struct snd_soc_codec *codec;
95 struct regulator_bulk_data supplies[DAC33_NUM_SUPPLIES]; 95 struct regulator_bulk_data supplies[DAC33_NUM_SUPPLIES];
96 struct snd_pcm_substream *substream; 96 struct snd_pcm_substream *substream;
97 int power_gpio; 97 int power_gpio;
98 int chip_power; 98 int chip_power;
99 int irq; 99 int irq;
100 unsigned int refclk; 100 unsigned int refclk;
101 101
102 unsigned int alarm_threshold; /* set to be half of LATENCY_TIME_MS */ 102 unsigned int alarm_threshold; /* set to be half of LATENCY_TIME_MS */
103 unsigned int nsample_min; /* nsample should not be lower than
104 * this */
105 unsigned int nsample_max; /* nsample should not be higher than
106 * this */
107 enum dac33_fifo_modes fifo_mode;/* FIFO mode selection */ 103 enum dac33_fifo_modes fifo_mode;/* FIFO mode selection */
104 unsigned int fifo_size; /* Size of the FIFO in samples */
108 unsigned int nsample; /* burst read amount from host */ 105 unsigned int nsample; /* burst read amount from host */
109 int mode1_latency; /* latency caused by the i2c writes in 106 int mode1_latency; /* latency caused by the i2c writes in
110 * us */ 107 * us */
111 int auto_fifo_config; /* Configure the FIFO based on the
112 * period size */
113 u8 burst_bclkdiv; /* BCLK divider value in burst mode */ 108 u8 burst_bclkdiv; /* BCLK divider value in burst mode */
114 unsigned int burst_rate; /* Interface speed in Burst modes */ 109 unsigned int burst_rate; /* Interface speed in Burst modes */
115 110
116 int keep_bclk; /* Keep the BCLK continuously running 111 int keep_bclk; /* Keep the BCLK continuously running
117 * in FIFO modes */ 112 * in FIFO modes */
118 spinlock_t lock; 113 spinlock_t lock;
119 unsigned long long t_stamp1; /* Time stamp for FIFO modes to */ 114 unsigned long long t_stamp1; /* Time stamp for FIFO modes to */
120 unsigned long long t_stamp2; /* calculate the FIFO caused delay */ 115 unsigned long long t_stamp2; /* calculate the FIFO caused delay */
121 116
122 unsigned int mode1_us_burst; /* Time to burst read n number of 117 unsigned int mode1_us_burst; /* Time to burst read n number of
(...skipping 173 matching lines...) Expand 10 before | Expand all | Expand 10 after
296 return ret; 291 return ret;
297 } 292 }
298 293
299 static void dac33_init_chip(struct snd_soc_codec *codec) 294 static void dac33_init_chip(struct snd_soc_codec *codec)
300 { 295 {
301 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); 296 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
302 297
303 if (unlikely(!dac33->chip_power)) 298 if (unlikely(!dac33->chip_power))
304 return; 299 return;
305 300
306 /* 44-46: DAC Control Registers */
307 /* A : DAC sample rate Fsref/1.5 */ 301 /* A : DAC sample rate Fsref/1.5 */
308 dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0)); 302 dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0));
309 /* B : DAC src=normal, not muted */ 303 /* B : DAC src=normal, not muted */
310 dac33_write(codec, DAC33_DAC_CTRL_B, DAC33_DACSRCR_RIGHT | 304 dac33_write(codec, DAC33_DAC_CTRL_B, DAC33_DACSRCR_RIGHT |
311 DAC33_DACSRCL_LEFT); 305 DAC33_DACSRCL_LEFT);
312 /* C : (defaults) */ 306 /* C : (defaults) */
313 dac33_write(codec, DAC33_DAC_CTRL_C, 0x00); 307 dac33_write(codec, DAC33_DAC_CTRL_C, 0x00);
314 308
315 /* 73 : volume soft stepping control, 309 /* 73 : volume soft stepping control,
316 clock source = internal osc (?) */ 310 clock source = internal osc (?) */
317 dac33_write(codec, DAC33_ANA_VOL_SOFT_STEP_CTRL, DAC33_VOLCLKEN); 311 dac33_write(codec, DAC33_ANA_VOL_SOFT_STEP_CTRL, DAC33_VOLCLKEN);
318 312
319 dac33_write(codec, DAC33_PWR_CTRL, DAC33_PDNALLB);
320
321 /* Restore only selected registers (gains mostly) */ 313 /* Restore only selected registers (gains mostly) */
322 dac33_write(codec, DAC33_LDAC_DIG_VOL_CTRL, 314 dac33_write(codec, DAC33_LDAC_DIG_VOL_CTRL,
323 dac33_read_reg_cache(codec, DAC33_LDAC_DIG_VOL_CTRL)); 315 dac33_read_reg_cache(codec, DAC33_LDAC_DIG_VOL_CTRL));
324 dac33_write(codec, DAC33_RDAC_DIG_VOL_CTRL, 316 dac33_write(codec, DAC33_RDAC_DIG_VOL_CTRL,
325 dac33_read_reg_cache(codec, DAC33_RDAC_DIG_VOL_CTRL)); 317 dac33_read_reg_cache(codec, DAC33_RDAC_DIG_VOL_CTRL));
326 318
327 dac33_write(codec, DAC33_LINEL_TO_LLO_VOL, 319 dac33_write(codec, DAC33_LINEL_TO_LLO_VOL,
328 dac33_read_reg_cache(codec, DAC33_LINEL_TO_LLO_VOL)); 320 dac33_read_reg_cache(codec, DAC33_LINEL_TO_LLO_VOL));
329 dac33_write(codec, DAC33_LINER_TO_RLO_VOL, 321 dac33_write(codec, DAC33_LINER_TO_RLO_VOL,
330 dac33_read_reg_cache(codec, DAC33_LINER_TO_RLO_VOL)); 322 dac33_read_reg_cache(codec, DAC33_LINER_TO_RLO_VOL));
323
324 dac33_write(codec, DAC33_OUT_AMP_CTRL,
325 dac33_read_reg_cache(codec, DAC33_OUT_AMP_CTRL));
326
331 } 327 }
332 328
333 static inline int dac33_read_id(struct snd_soc_codec *codec) 329 static inline int dac33_read_id(struct snd_soc_codec *codec)
334 { 330 {
335 int i, ret = 0; 331 int i, ret = 0;
336 u8 reg; 332 u8 reg;
337 333
338 for (i = 0; i < 3; i++) { 334 for (i = 0; i < 3; i++) {
339 ret = dac33_read(codec, DAC33_DEVICE_ID_MSB + i, &reg); 335 ret = dac33_read(codec, DAC33_DEVICE_ID_MSB + i, &reg);
340 if (ret < 0) 336 if (ret < 0)
341 break; 337 break;
342 } 338 }
343 339
344 return ret; 340 return ret;
345 } 341 }
346 342
347 static inline void dac33_soft_power(struct snd_soc_codec *codec, int power) 343 static inline void dac33_soft_power(struct snd_soc_codec *codec, int power)
348 { 344 {
349 u8 reg; 345 u8 reg;
350 346
351 reg = dac33_read_reg_cache(codec, DAC33_PWR_CTRL); 347 reg = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
352 if (power) 348 if (power)
353 reg |= DAC33_PDNALLB; 349 reg |= DAC33_PDNALLB;
354 else 350 else
355 reg &= ~(DAC33_PDNALLB | DAC33_OSCPDNB | 351 reg &= ~(DAC33_PDNALLB | DAC33_OSCPDNB |
356 DAC33_DACRPDNB | DAC33_DACLPDNB); 352 DAC33_DACRPDNB | DAC33_DACLPDNB);
357 dac33_write(codec, DAC33_PWR_CTRL, reg); 353 dac33_write(codec, DAC33_PWR_CTRL, reg);
358 } 354 }
359 355
356 static inline void dac33_disable_digital(struct snd_soc_codec *codec)
357 {
358 u8 reg;
359
360 /* Stop the DAI clock */
361 reg = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B);
362 reg &= ~DAC33_BCLKON;
363 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, reg);
364
365 /* Power down the Oscillator, and DACs */
366 reg = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
367 reg &= ~(DAC33_OSCPDNB | DAC33_DACRPDNB | DAC33_DACLPDNB);
368 dac33_write(codec, DAC33_PWR_CTRL, reg);
369 }
370
360 static int dac33_hard_power(struct snd_soc_codec *codec, int power) 371 static int dac33_hard_power(struct snd_soc_codec *codec, int power)
361 { 372 {
362 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); 373 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
363 int ret = 0; 374 int ret = 0;
364 375
365 mutex_lock(&dac33->mutex); 376 mutex_lock(&dac33->mutex);
366 377
367 /* Safety check */ 378 /* Safety check */
368 if (unlikely(power == dac33->chip_power)) { 379 if (unlikely(power == dac33->chip_power)) {
369 dev_dbg(codec->dev, "Trying to set the same power state: %s\n", 380 dev_dbg(codec->dev, "Trying to set the same power state: %s\n",
(...skipping 28 matching lines...) Expand all
398 } 409 }
399 410
400 dac33->chip_power = 0; 411 dac33->chip_power = 0;
401 } 412 }
402 413
403 exit: 414 exit:
404 mutex_unlock(&dac33->mutex); 415 mutex_unlock(&dac33->mutex);
405 return ret; 416 return ret;
406 } 417 }
407 418
408 static int playback_event(struct snd_soc_dapm_widget *w, 419 static int dac33_playback_event(struct snd_soc_dapm_widget *w,
409 struct snd_kcontrol *kcontrol, int event) 420 struct snd_kcontrol *kcontrol, int event)
410 { 421 {
411 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(w->codec); 422 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(w->codec);
412 423
413 switch (event) { 424 switch (event) {
414 case SND_SOC_DAPM_PRE_PMU: 425 case SND_SOC_DAPM_PRE_PMU:
415 if (likely(dac33->substream)) { 426 if (likely(dac33->substream)) {
416 dac33_calculate_times(dac33->substream); 427 dac33_calculate_times(dac33->substream);
417 dac33_prepare_chip(dac33->substream); 428 dac33_prepare_chip(dac33->substream);
418 } 429 }
419 break; 430 break;
431 case SND_SOC_DAPM_POST_PMD:
432 dac33_disable_digital(w->codec);
433 break;
420 } 434 }
421 return 0; 435 return 0;
422 } 436 }
423 437
424 static int dac33_get_nsample(struct snd_kcontrol *kcontrol,
425 struct snd_ctl_elem_value *ucontrol)
426 {
427 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
428 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
429
430 ucontrol->value.integer.value[0] = dac33->nsample;
431
432 return 0;
433 }
434
435 static int dac33_set_nsample(struct snd_kcontrol *kcontrol,
436 struct snd_ctl_elem_value *ucontrol)
437 {
438 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
439 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
440 int ret = 0;
441
442 if (dac33->nsample == ucontrol->value.integer.value[0])
443 return 0;
444
445 if (ucontrol->value.integer.value[0] < dac33->nsample_min ||
446 ucontrol->value.integer.value[0] > dac33->nsample_max) {
447 ret = -EINVAL;
448 } else {
449 dac33->nsample = ucontrol->value.integer.value[0];
450 /* Re calculate the burst time */
451 dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate,
452 dac33->nsample);
453 }
454
455 return ret;
456 }
457
458 static int dac33_get_uthr(struct snd_kcontrol *kcontrol,
459 struct snd_ctl_elem_value *ucontrol)
460 {
461 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
462 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
463
464 ucontrol->value.integer.value[0] = dac33->uthr;
465
466 return 0;
467 }
468
469 static int dac33_set_uthr(struct snd_kcontrol *kcontrol,
470 struct snd_ctl_elem_value *ucontrol)
471 {
472 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
473 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
474 int ret = 0;
475
476 if (dac33->substream)
477 return -EBUSY;
478
479 if (dac33->uthr == ucontrol->value.integer.value[0])
480 return 0;
481
482 if (ucontrol->value.integer.value[0] < (MODE7_LTHR + 10) ||
483 ucontrol->value.integer.value[0] > MODE7_UTHR)
484 ret = -EINVAL;
485 else
486 dac33->uthr = ucontrol->value.integer.value[0];
487
488 return ret;
489 }
490
491 static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol, 438 static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol,
492 struct snd_ctl_elem_value *ucontrol) 439 struct snd_ctl_elem_value *ucontrol)
493 { 440 {
494 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 441 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
495 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); 442 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
496 443
497 ucontrol->value.integer.value[0] = dac33->fifo_mode; 444 ucontrol->value.integer.value[0] = dac33->fifo_mode;
498 445
499 return 0; 446 return 0;
500 } 447 }
(...skipping 64 matching lines...) Expand 10 before | Expand all | Expand 10 after
565 DAC33_LINEL_TO_LLO_VOL, DAC33_LINER_TO_RLO_VOL, 0, 127, 1), 512 DAC33_LINEL_TO_LLO_VOL, DAC33_LINER_TO_RLO_VOL, 0, 127, 1),
566 SOC_ENUM("Left Line Output Gain", l_lineout_gain_enum), 513 SOC_ENUM("Left Line Output Gain", l_lineout_gain_enum),
567 SOC_ENUM("Right Line Output Gain", r_lineout_gain_enum), 514 SOC_ENUM("Right Line Output Gain", r_lineout_gain_enum),
568 }; 515 };
569 516
570 static const struct snd_kcontrol_new dac33_mode_snd_controls[] = { 517 static const struct snd_kcontrol_new dac33_mode_snd_controls[] = {
571 SOC_ENUM_EXT("FIFO Mode", dac33_fifo_mode_enum, 518 SOC_ENUM_EXT("FIFO Mode", dac33_fifo_mode_enum,
572 dac33_get_fifo_mode, dac33_set_fifo_mode), 519 dac33_get_fifo_mode, dac33_set_fifo_mode),
573 }; 520 };
574 521
575 static const struct snd_kcontrol_new dac33_fifo_snd_controls[] = {
576 SOC_SINGLE_EXT("nSample", 0, 0, 5900, 0,
577 dac33_get_nsample, dac33_set_nsample),
578 SOC_SINGLE_EXT("UTHR", 0, 0, MODE7_UTHR, 0,
579 dac33_get_uthr, dac33_set_uthr),
580 };
581
582 /* Analog bypass */ 522 /* Analog bypass */
583 static const struct snd_kcontrol_new dac33_dapm_abypassl_control = 523 static const struct snd_kcontrol_new dac33_dapm_abypassl_control =
584 SOC_DAPM_SINGLE("Switch", DAC33_LINEL_TO_LLO_VOL, 7, 1, 1); 524 SOC_DAPM_SINGLE("Switch", DAC33_LINEL_TO_LLO_VOL, 7, 1, 1);
585 525
586 static const struct snd_kcontrol_new dac33_dapm_abypassr_control = 526 static const struct snd_kcontrol_new dac33_dapm_abypassr_control =
587 SOC_DAPM_SINGLE("Switch", DAC33_LINER_TO_RLO_VOL, 7, 1, 1); 527 SOC_DAPM_SINGLE("Switch", DAC33_LINER_TO_RLO_VOL, 7, 1, 1);
588 528
529 /* LOP L/R invert selection */
530 static const char *dac33_lr_lom_texts[] = {"DAC", "LOP"};
531
532 static const struct soc_enum dac33_left_lom_enum =
533 SOC_ENUM_SINGLE(DAC33_OUT_AMP_CTRL, 3,
534 ARRAY_SIZE(dac33_lr_lom_texts),
535 dac33_lr_lom_texts);
536
537 static const struct snd_kcontrol_new dac33_dapm_left_lom_control =
538 SOC_DAPM_ENUM("Route", dac33_left_lom_enum);
539
540 static const struct soc_enum dac33_right_lom_enum =
541 SOC_ENUM_SINGLE(DAC33_OUT_AMP_CTRL, 2,
542 ARRAY_SIZE(dac33_lr_lom_texts),
543 dac33_lr_lom_texts);
544
545 static const struct snd_kcontrol_new dac33_dapm_right_lom_control =
546 SOC_DAPM_ENUM("Route", dac33_right_lom_enum);
547
589 static const struct snd_soc_dapm_widget dac33_dapm_widgets[] = { 548 static const struct snd_soc_dapm_widget dac33_dapm_widgets[] = {
590 SND_SOC_DAPM_OUTPUT("LEFT_LO"), 549 SND_SOC_DAPM_OUTPUT("LEFT_LO"),
591 SND_SOC_DAPM_OUTPUT("RIGHT_LO"), 550 SND_SOC_DAPM_OUTPUT("RIGHT_LO"),
592 551
593 SND_SOC_DAPM_INPUT("LINEL"), 552 SND_SOC_DAPM_INPUT("LINEL"),
594 SND_SOC_DAPM_INPUT("LINER"), 553 SND_SOC_DAPM_INPUT("LINER"),
595 554
596 » SND_SOC_DAPM_DAC("DACL", "Left Playback", DAC33_LDAC_PWR_CTRL, 2, 0), 555 » SND_SOC_DAPM_DAC("DACL", "Left Playback", SND_SOC_NOPM, 0, 0),
597 » SND_SOC_DAPM_DAC("DACR", "Right Playback", DAC33_RDAC_PWR_CTRL, 2, 0), 556 » SND_SOC_DAPM_DAC("DACR", "Right Playback", SND_SOC_NOPM, 0, 0),
598 557
599 /* Analog bypass */ 558 /* Analog bypass */
600 SND_SOC_DAPM_SWITCH("Analog Left Bypass", SND_SOC_NOPM, 0, 0, 559 SND_SOC_DAPM_SWITCH("Analog Left Bypass", SND_SOC_NOPM, 0, 0,
601 &dac33_dapm_abypassl_control), 560 &dac33_dapm_abypassl_control),
602 SND_SOC_DAPM_SWITCH("Analog Right Bypass", SND_SOC_NOPM, 0, 0, 561 SND_SOC_DAPM_SWITCH("Analog Right Bypass", SND_SOC_NOPM, 0, 0,
603 &dac33_dapm_abypassr_control), 562 &dac33_dapm_abypassr_control),
604 563
605 » SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Left Amp Power", 564 » SND_SOC_DAPM_MUX("Left LOM Inverted From", SND_SOC_NOPM, 0, 0,
565 » » &dac33_dapm_left_lom_control),
566 » SND_SOC_DAPM_MUX("Right LOM Inverted From", SND_SOC_NOPM, 0, 0,
567 » » &dac33_dapm_right_lom_control),
568 » /*
569 » * For DAPM path, when only the anlog bypass path is enabled, and the
570 » * LOP inverted from the corresponding DAC side.
571 » * This is needed, so we can attach the DAC power supply in this case.
572 » */
573 » SND_SOC_DAPM_PGA("Left Bypass PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
574 » SND_SOC_DAPM_PGA("Right Bypass PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
575
576 » SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Left Amplifier",
606 DAC33_OUT_AMP_PWR_CTRL, 6, 3, 3, 0), 577 DAC33_OUT_AMP_PWR_CTRL, 6, 3, 3, 0),
607 » SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Right Amp Power", 578 » SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Right Amplifier",
608 DAC33_OUT_AMP_PWR_CTRL, 4, 3, 3, 0), 579 DAC33_OUT_AMP_PWR_CTRL, 4, 3, 3, 0),
609 580
610 » SND_SOC_DAPM_PRE("Prepare Playback", playback_event), 581 » SND_SOC_DAPM_SUPPLY("Left DAC Power",
582 » » » DAC33_LDAC_PWR_CTRL, 2, 0, NULL, 0),
583 » SND_SOC_DAPM_SUPPLY("Right DAC Power",
584 » » » DAC33_RDAC_PWR_CTRL, 2, 0, NULL, 0),
585
586 » SND_SOC_DAPM_PRE("Pre Playback", dac33_playback_event),
587 » SND_SOC_DAPM_POST("Post Playback", dac33_playback_event),
611 }; 588 };
612 589
613 static const struct snd_soc_dapm_route audio_map[] = { 590 static const struct snd_soc_dapm_route audio_map[] = {
614 /* Analog bypass */ 591 /* Analog bypass */
615 {"Analog Left Bypass", "Switch", "LINEL"}, 592 {"Analog Left Bypass", "Switch", "LINEL"},
616 {"Analog Right Bypass", "Switch", "LINER"}, 593 {"Analog Right Bypass", "Switch", "LINER"},
617 594
618 » {"Output Left Amp Power", NULL, "DACL"}, 595 » {"Output Left Amplifier", NULL, "DACL"},
619 » {"Output Right Amp Power", NULL, "DACR"}, 596 » {"Output Right Amplifier", NULL, "DACR"},
620 597
621 » {"Output Left Amp Power", NULL, "Analog Left Bypass"}, 598 » {"Left Bypass PGA", NULL, "Analog Left Bypass"},
622 » {"Output Right Amp Power", NULL, "Analog Right Bypass"}, 599 » {"Right Bypass PGA", NULL, "Analog Right Bypass"},
600
601 » {"Left LOM Inverted From", "DAC", "Left Bypass PGA"},
602 » {"Right LOM Inverted From", "DAC", "Right Bypass PGA"},
603 » {"Left LOM Inverted From", "LOP", "Analog Left Bypass"},
604 » {"Right LOM Inverted From", "LOP", "Analog Right Bypass"},
605
606 » {"Output Left Amplifier", NULL, "Left LOM Inverted From"},
607 » {"Output Right Amplifier", NULL, "Right LOM Inverted From"},
608
609 » {"DACL", NULL, "Left DAC Power"},
610 » {"DACR", NULL, "Right DAC Power"},
611
612 » {"Left Bypass PGA", NULL, "Left DAC Power"},
613 » {"Right Bypass PGA", NULL, "Right DAC Power"},
623 614
624 /* output */ 615 /* output */
625 » {"LEFT_LO", NULL, "Output Left Amp Power"}, 616 » {"LEFT_LO", NULL, "Output Left Amplifier"},
626 » {"RIGHT_LO", NULL, "Output Right Amp Power"}, 617 » {"RIGHT_LO", NULL, "Output Right Amplifier"},
627 }; 618 };
628 619
629 static int dac33_add_widgets(struct snd_soc_codec *codec) 620 static int dac33_add_widgets(struct snd_soc_codec *codec)
630 { 621 {
631 » snd_soc_dapm_new_controls(codec, dac33_dapm_widgets, 622 » struct snd_soc_dapm_context *dapm = &codec->dapm;
623
624 » snd_soc_dapm_new_controls(dapm, dac33_dapm_widgets,
632 ARRAY_SIZE(dac33_dapm_widgets)); 625 ARRAY_SIZE(dac33_dapm_widgets));
633
634 /* set up audio path interconnects */ 626 /* set up audio path interconnects */
635 » snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); 627 » snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
636 628
637 return 0; 629 return 0;
638 } 630 }
639 631
640 static int dac33_set_bias_level(struct snd_soc_codec *codec, 632 static int dac33_set_bias_level(struct snd_soc_codec *codec,
641 enum snd_soc_bias_level level) 633 enum snd_soc_bias_level level)
642 { 634 {
635 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
643 int ret; 636 int ret;
644 637
645 switch (level) { 638 switch (level) {
646 case SND_SOC_BIAS_ON: 639 case SND_SOC_BIAS_ON:
647 » » dac33_soft_power(codec, 1); 640 » » if (!dac33->substream)
641 » » » dac33_soft_power(codec, 1);
648 break; 642 break;
649 case SND_SOC_BIAS_PREPARE: 643 case SND_SOC_BIAS_PREPARE:
650 break; 644 break;
651 case SND_SOC_BIAS_STANDBY: 645 case SND_SOC_BIAS_STANDBY:
652 » » if (codec->bias_level == SND_SOC_BIAS_OFF) { 646 » » if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
653 /* Coming from OFF, switch on the codec */ 647 /* Coming from OFF, switch on the codec */
654 ret = dac33_hard_power(codec, 1); 648 ret = dac33_hard_power(codec, 1);
655 if (ret != 0) 649 if (ret != 0)
656 return ret; 650 return ret;
657 651
658 dac33_init_chip(codec); 652 dac33_init_chip(codec);
659 } 653 }
660 break; 654 break;
661 case SND_SOC_BIAS_OFF: 655 case SND_SOC_BIAS_OFF:
662 /* Do not power off, when the codec is already off */ 656 /* Do not power off, when the codec is already off */
663 » » if (codec->bias_level == SND_SOC_BIAS_OFF) 657 » » if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
664 return 0; 658 return 0;
665 ret = dac33_hard_power(codec, 0); 659 ret = dac33_hard_power(codec, 0);
666 if (ret != 0) 660 if (ret != 0)
667 return ret; 661 return ret;
668 break; 662 break;
669 } 663 }
670 » codec->bias_level = level; 664 » codec->dapm.bias_level = level;
671 665
672 return 0; 666 return 0;
673 } 667 }
674 668
675 static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33) 669 static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
676 { 670 {
677 struct snd_soc_codec *codec = dac33->codec; 671 struct snd_soc_codec *codec = dac33->codec;
678 unsigned int delay; 672 unsigned int delay;
679 673
680 switch (dac33->fifo_mode) { 674 switch (dac33->fifo_mode) {
(...skipping 17 matching lines...) Expand all
698 break; 692 break;
699 case DAC33_FIFO_MODE7: 693 case DAC33_FIFO_MODE7:
700 /* Take the timestamp */ 694 /* Take the timestamp */
701 spin_lock_irq(&dac33->lock); 695 spin_lock_irq(&dac33->lock);
702 dac33->t_stamp1 = ktime_to_us(ktime_get()); 696 dac33->t_stamp1 = ktime_to_us(ktime_get());
703 /* Move back the timestamp with drain time */ 697 /* Move back the timestamp with drain time */
704 dac33->t_stamp1 -= dac33->mode7_us_to_lthr; 698 dac33->t_stamp1 -= dac33->mode7_us_to_lthr;
705 spin_unlock_irq(&dac33->lock); 699 spin_unlock_irq(&dac33->lock);
706 700
707 dac33_write16(codec, DAC33_PREFILL_MSB, 701 dac33_write16(codec, DAC33_PREFILL_MSB,
708 » » » » DAC33_THRREG(MODE7_LTHR)); 702 » » » » DAC33_THRREG(DAC33_MODE7_MARGIN));
709 703
710 /* Enable Upper Threshold IRQ */ 704 /* Enable Upper Threshold IRQ */
711 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MUT); 705 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MUT);
712 break; 706 break;
713 default: 707 default:
714 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n", 708 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
715 dac33->fifo_mode); 709 dac33->fifo_mode);
716 break; 710 break;
717 } 711 }
718 } 712 }
(...skipping 89 matching lines...) Expand 10 before | Expand all | Expand 10 after
808 static int dac33_startup(struct snd_pcm_substream *substream, 802 static int dac33_startup(struct snd_pcm_substream *substream,
809 struct snd_soc_dai *dai) 803 struct snd_soc_dai *dai)
810 { 804 {
811 struct snd_soc_pcm_runtime *rtd = substream->private_data; 805 struct snd_soc_pcm_runtime *rtd = substream->private_data;
812 struct snd_soc_codec *codec = rtd->codec; 806 struct snd_soc_codec *codec = rtd->codec;
813 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); 807 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
814 808
815 /* Stream started, save the substream pointer */ 809 /* Stream started, save the substream pointer */
816 dac33->substream = substream; 810 dac33->substream = substream;
817 811
812 snd_pcm_hw_constraint_msbits(substream->runtime, 0, 32, 24);
813
818 return 0; 814 return 0;
819 } 815 }
820 816
821 static void dac33_shutdown(struct snd_pcm_substream *substream, 817 static void dac33_shutdown(struct snd_pcm_substream *substream,
822 struct snd_soc_dai *dai) 818 struct snd_soc_dai *dai)
823 { 819 {
824 struct snd_soc_pcm_runtime *rtd = substream->private_data; 820 struct snd_soc_pcm_runtime *rtd = substream->private_data;
825 struct snd_soc_codec *codec = rtd->codec; 821 struct snd_soc_codec *codec = rtd->codec;
826 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); 822 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
827 823
828 dac33->substream = NULL; 824 dac33->substream = NULL;
829
830 /* Reset the nSample restrictions */
831 dac33->nsample_min = 0;
832 dac33->nsample_max = NSAMPLE_MAX;
833 } 825 }
834 826
827 #define CALC_BURST_RATE(bclkdiv, bclk_per_sample) \
828 (BURST_BASEFREQ_HZ / bclkdiv / bclk_per_sample)
835 static int dac33_hw_params(struct snd_pcm_substream *substream, 829 static int dac33_hw_params(struct snd_pcm_substream *substream,
836 struct snd_pcm_hw_params *params, 830 struct snd_pcm_hw_params *params,
837 struct snd_soc_dai *dai) 831 struct snd_soc_dai *dai)
838 { 832 {
839 struct snd_soc_pcm_runtime *rtd = substream->private_data; 833 struct snd_soc_pcm_runtime *rtd = substream->private_data;
840 struct snd_soc_codec *codec = rtd->codec; 834 struct snd_soc_codec *codec = rtd->codec;
835 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
841 836
842 /* Check parameters for validity */ 837 /* Check parameters for validity */
843 switch (params_rate(params)) { 838 switch (params_rate(params)) {
844 case 44100: 839 case 44100:
845 case 48000: 840 case 48000:
846 break; 841 break;
847 default: 842 default:
848 dev_err(codec->dev, "unsupported rate %d\n", 843 dev_err(codec->dev, "unsupported rate %d\n",
849 params_rate(params)); 844 params_rate(params));
850 return -EINVAL; 845 return -EINVAL;
851 } 846 }
852 847
853 switch (params_format(params)) { 848 switch (params_format(params)) {
854 case SNDRV_PCM_FORMAT_S16_LE: 849 case SNDRV_PCM_FORMAT_S16_LE:
850 dac33->fifo_size = DAC33_FIFO_SIZE_16BIT;
851 dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 32);
852 break;
853 case SNDRV_PCM_FORMAT_S32_LE:
854 dac33->fifo_size = DAC33_FIFO_SIZE_24BIT;
855 dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 64);
855 break; 856 break;
856 default: 857 default:
857 dev_err(codec->dev, "unsupported format %d\n", 858 dev_err(codec->dev, "unsupported format %d\n",
858 params_format(params)); 859 params_format(params));
859 return -EINVAL; 860 return -EINVAL;
860 } 861 }
861 862
862 return 0; 863 return 0;
863 } 864 }
864 865
(...skipping 34 matching lines...) Expand 10 before | Expand all | Expand 10 after
899 /* Read FIFO control A, and clear FIFO flush bit */ 900 /* Read FIFO control A, and clear FIFO flush bit */
900 fifoctrl_a = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A); 901 fifoctrl_a = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A);
901 fifoctrl_a &= ~DAC33_FIFOFLUSH; 902 fifoctrl_a &= ~DAC33_FIFOFLUSH;
902 903
903 fifoctrl_a &= ~DAC33_WIDTH; 904 fifoctrl_a &= ~DAC33_WIDTH;
904 switch (substream->runtime->format) { 905 switch (substream->runtime->format) {
905 case SNDRV_PCM_FORMAT_S16_LE: 906 case SNDRV_PCM_FORMAT_S16_LE:
906 aictrl_a |= (DAC33_NCYCL_16 | DAC33_WLEN_16); 907 aictrl_a |= (DAC33_NCYCL_16 | DAC33_WLEN_16);
907 fifoctrl_a |= DAC33_WIDTH; 908 fifoctrl_a |= DAC33_WIDTH;
908 break; 909 break;
910 case SNDRV_PCM_FORMAT_S32_LE:
911 aictrl_a |= (DAC33_NCYCL_32 | DAC33_WLEN_24);
912 break;
909 default: 913 default:
910 dev_err(codec->dev, "unsupported format %d\n", 914 dev_err(codec->dev, "unsupported format %d\n",
911 substream->runtime->format); 915 substream->runtime->format);
912 return -EINVAL; 916 return -EINVAL;
913 } 917 }
914 918
915 mutex_lock(&dac33->mutex); 919 mutex_lock(&dac33->mutex);
916 920
917 if (!dac33->chip_power) { 921 if (!dac33->chip_power) {
918 /* 922 /*
(...skipping 114 matching lines...) Expand 10 before | Expand all | Expand 10 after
1033 * 1: 1 1037 * 1: 1
1034 * 2: 2 1038 * 2: 2
1035 * ... 1039 * ...
1036 * 254: 254 1040 * 254: 254
1037 * 255: 255 1041 * 255: 255
1038 */ 1042 */
1039 if (dac33->fifo_mode) 1043 if (dac33->fifo_mode)
1040 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 1044 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C,
1041 dac33->burst_bclkdiv); 1045 dac33->burst_bclkdiv);
1042 else 1046 else
1043 » » dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32); 1047 » » if (substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE)
1048 » » » dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
1049 » » else
1050 » » » dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 16);
1044 1051
1045 switch (dac33->fifo_mode) { 1052 switch (dac33->fifo_mode) {
1046 case DAC33_FIFO_MODE1: 1053 case DAC33_FIFO_MODE1:
1047 dac33_write16(codec, DAC33_ATHR_MSB, 1054 dac33_write16(codec, DAC33_ATHR_MSB,
1048 DAC33_THRREG(dac33->alarm_threshold)); 1055 DAC33_THRREG(dac33->alarm_threshold));
1049 break; 1056 break;
1050 case DAC33_FIFO_MODE7: 1057 case DAC33_FIFO_MODE7:
1051 /* 1058 /*
1052 * Configure the threshold levels, and leave 10 sample space 1059 * Configure the threshold levels, and leave 10 sample space
1053 * at the bottom, and also at the top of the FIFO 1060 * at the bottom, and also at the top of the FIFO
1054 */ 1061 */
1055 dac33_write16(codec, DAC33_UTHR_MSB, DAC33_THRREG(dac33->uthr)); 1062 dac33_write16(codec, DAC33_UTHR_MSB, DAC33_THRREG(dac33->uthr));
1056 » » dac33_write16(codec, DAC33_LTHR_MSB, DAC33_THRREG(MODE7_LTHR)); 1063 » » dac33_write16(codec, DAC33_LTHR_MSB,
1064 » » » DAC33_THRREG(DAC33_MODE7_MARGIN));
1057 break; 1065 break;
1058 default: 1066 default:
1059 break; 1067 break;
1060 } 1068 }
1061 1069
1062 mutex_unlock(&dac33->mutex); 1070 mutex_unlock(&dac33->mutex);
1063 1071
1064 return 0; 1072 return 0;
1065 } 1073 }
1066 1074
1067 static void dac33_calculate_times(struct snd_pcm_substream *substream) 1075 static void dac33_calculate_times(struct snd_pcm_substream *substream)
1068 { 1076 {
1069 struct snd_soc_pcm_runtime *rtd = substream->private_data; 1077 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1070 struct snd_soc_codec *codec = rtd->codec; 1078 struct snd_soc_codec *codec = rtd->codec;
1071 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); 1079 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1072 unsigned int period_size = substream->runtime->period_size; 1080 unsigned int period_size = substream->runtime->period_size;
1073 unsigned int rate = substream->runtime->rate; 1081 unsigned int rate = substream->runtime->rate;
1074 unsigned int nsample_limit; 1082 unsigned int nsample_limit;
1075 1083
1076 /* In bypass mode we don't need to calculate */ 1084 /* In bypass mode we don't need to calculate */
1077 if (!dac33->fifo_mode) 1085 if (!dac33->fifo_mode)
1078 return; 1086 return;
1079 1087
1080 switch (dac33->fifo_mode) { 1088 switch (dac33->fifo_mode) {
1081 case DAC33_FIFO_MODE1: 1089 case DAC33_FIFO_MODE1:
1082 /* Number of samples under i2c latency */ 1090 /* Number of samples under i2c latency */
1083 dac33->alarm_threshold = US_TO_SAMPLES(rate, 1091 dac33->alarm_threshold = US_TO_SAMPLES(rate,
1084 dac33->mode1_latency); 1092 dac33->mode1_latency);
1085 » » nsample_limit = DAC33_BUFFER_SIZE_SAMPLES - 1093 » » nsample_limit = dac33->fifo_size - dac33->alarm_threshold;
1086 » » » » dac33->alarm_threshold;
1087 1094
1088 » » if (dac33->auto_fifo_config) { 1095 » » if (period_size <= dac33->alarm_threshold)
1089 » » » if (period_size <= dac33->alarm_threshold)
1090 » » » » /*
1091 » » » » * Configure nSamaple to number of periods,
1092 » » » » * which covers the latency requironment.
1093 » » » » */
1094 » » » » dac33->nsample = period_size *
1095 » » » » ((dac33->alarm_threshold / period_size) +
1096 » » » » (dac33->alarm_threshold % period_size ?
1097 » » » » 1 : 0));
1098 » » » else if (period_size > nsample_limit)
1099 » » » » dac33->nsample = nsample_limit;
1100 » » » else
1101 » » » » dac33->nsample = period_size;
1102 » » } else {
1103 » » » /* nSample time shall not be shorter than i2c latency */
1104 » » » dac33->nsample_min = dac33->alarm_threshold;
1105 /* 1096 /*
1106 » » » * nSample should not be bigger than alsa buffer minus 1097 » » » * Configure nSamaple to number of periods,
1107 » » » * size of one period to avoid overruns 1098 » » » * which covers the latency requironment.
1108 */ 1099 */
1109 » » » dac33->nsample_max = substream->runtime->buffer_size - 1100 » » » dac33->nsample = period_size *
1110 » » » » » » period_size; 1101 » » » » ((dac33->alarm_threshold / period_size) +
1111 1102 » » » » (dac33->alarm_threshold % period_size ?
1112 » » » if (dac33->nsample_max > nsample_limit) 1103 » » » » 1 : 0));
1113 » » » » dac33->nsample_max = nsample_limit; 1104 » » else if (period_size > nsample_limit)
1114 1105 » » » dac33->nsample = nsample_limit;
1115 » » » /* Correct the nSample if it is outside of the ranges */ 1106 » » else
1116 » » » if (dac33->nsample < dac33->nsample_min) 1107 » » » dac33->nsample = period_size;
1117 » » » » dac33->nsample = dac33->nsample_min;
1118 » » » if (dac33->nsample > dac33->nsample_max)
1119 » » » » dac33->nsample = dac33->nsample_max;
1120 » » }
1121 1108
1122 dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate, 1109 dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate,
1123 dac33->nsample); 1110 dac33->nsample);
1124 dac33->t_stamp1 = 0; 1111 dac33->t_stamp1 = 0;
1125 dac33->t_stamp2 = 0; 1112 dac33->t_stamp2 = 0;
1126 break; 1113 break;
1127 case DAC33_FIFO_MODE7: 1114 case DAC33_FIFO_MODE7:
1128 » » if (dac33->auto_fifo_config) { 1115 » » dac33->uthr = UTHR_FROM_PERIOD_SIZE(period_size, rate,
1129 » » » dac33->uthr = UTHR_FROM_PERIOD_SIZE( 1116 » » » » » » dac33->burst_rate) + 9;
1130 » » » » » period_size, 1117 » » if (dac33->uthr > (dac33->fifo_size - DAC33_MODE7_MARGIN))
1131 » » » » » rate, 1118 » » » dac33->uthr = dac33->fifo_size - DAC33_MODE7_MARGIN;
1132 » » » » » dac33->burst_rate) + 9; 1119 » » if (dac33->uthr < (DAC33_MODE7_MARGIN + 10))
1133 » » » if (dac33->uthr > MODE7_UTHR) 1120 » » » dac33->uthr = (DAC33_MODE7_MARGIN + 10);
1134 » » » » dac33->uthr = MODE7_UTHR; 1121
1135 » » » if (dac33->uthr < (MODE7_LTHR + 10))
1136 » » » » dac33->uthr = (MODE7_LTHR + 10);
1137 » » }
1138 dac33->mode7_us_to_lthr = 1122 dac33->mode7_us_to_lthr =
1139 SAMPLES_TO_US(substream->runtime->rate, 1123 SAMPLES_TO_US(substream->runtime->rate,
1140 » » » » » dac33->uthr - MODE7_LTHR + 1); 1124 » » » » » dac33->uthr - DAC33_MODE7_MARGIN + 1);
1141 dac33->t_stamp1 = 0; 1125 dac33->t_stamp1 = 0;
1142 break; 1126 break;
1143 default: 1127 default:
1144 break; 1128 break;
1145 } 1129 }
1146 1130
1147 } 1131 }
1148 1132
1149 static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd, 1133 static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
1150 struct snd_soc_dai *dai) 1134 struct snd_soc_dai *dai)
(...skipping 97 matching lines...) Expand 10 before | Expand all | Expand 10 after
1248 time_delta = t_now - t0; 1232 time_delta = t_now - t0;
1249 samples_out = time_delta ? US_TO_SAMPLES( 1233 samples_out = time_delta ? US_TO_SAMPLES(
1250 substream->runtime->rate, 1234 substream->runtime->rate,
1251 time_delta) : 0; 1235 time_delta) : 0;
1252 1236
1253 samples_in = dac33->nsample; 1237 samples_in = dac33->nsample;
1254 samples = dac33->alarm_threshold; 1238 samples = dac33->alarm_threshold;
1255 samples += (samples_in - samples_out); 1239 samples += (samples_in - samples_out);
1256 1240
1257 if (likely(samples > 0)) 1241 if (likely(samples > 0))
1258 » » » » delay = samples > DAC33_BUFFER_SIZE_SAMPLES ? 1242 » » » » delay = samples > dac33->fifo_size ?
1259 » » » » » DAC33_BUFFER_SIZE_SAMPLES : samples; 1243 » » » » » dac33->fifo_size : samples;
1260 else 1244 else
1261 delay = 0; 1245 delay = 0;
1262 } 1246 }
1263 break; 1247 break;
1264 case DAC33_FIFO_MODE7: 1248 case DAC33_FIFO_MODE7:
1265 spin_lock(&dac33->lock); 1249 spin_lock(&dac33->lock);
1266 t0 = dac33->t_stamp1; 1250 t0 = dac33->t_stamp1;
1267 uthr = dac33->uthr; 1251 uthr = dac33->uthr;
1268 spin_unlock(&dac33->lock); 1252 spin_unlock(&dac33->lock);
1269 t_now = ktime_to_us(ktime_get()); 1253 t_now = ktime_to_us(ktime_get());
(...skipping 31 matching lines...) Expand 10 before | Expand all | Expand 10 after
1301 * During burst operation 1285 * During burst operation
1302 */ 1286 */
1303 time_delta = time_delta - dac33->mode7_us_to_lthr; 1287 time_delta = time_delta - dac33->mode7_us_to_lthr;
1304 1288
1305 samples_out = US_TO_SAMPLES( 1289 samples_out = US_TO_SAMPLES(
1306 substream->runtime->rate, 1290 substream->runtime->rate,
1307 time_delta); 1291 time_delta);
1308 samples_in = US_TO_SAMPLES( 1292 samples_in = US_TO_SAMPLES(
1309 dac33->burst_rate, 1293 dac33->burst_rate,
1310 time_delta); 1294 time_delta);
1311 » » » delay = MODE7_LTHR + samples_in - samples_out; 1295 » » » delay = DAC33_MODE7_MARGIN + samples_in - samples_out;
1312 1296
1313 if (unlikely(delay > uthr)) 1297 if (unlikely(delay > uthr))
1314 delay = uthr; 1298 delay = uthr;
1315 } 1299 }
1316 break; 1300 break;
1317 default: 1301 default:
1318 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n", 1302 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
1319 dac33->fifo_mode); 1303 dac33->fifo_mode);
1320 break; 1304 break;
1321 } 1305 }
(...skipping 86 matching lines...) Expand 10 before | Expand all | Expand 10 after
1408 return 0; 1392 return 0;
1409 } 1393 }
1410 1394
1411 static int dac33_soc_probe(struct snd_soc_codec *codec) 1395 static int dac33_soc_probe(struct snd_soc_codec *codec)
1412 { 1396 {
1413 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); 1397 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1414 int ret = 0; 1398 int ret = 0;
1415 1399
1416 codec->control_data = dac33->control_data; 1400 codec->control_data = dac33->control_data;
1417 codec->hw_write = (hw_write_t) i2c_master_send; 1401 codec->hw_write = (hw_write_t) i2c_master_send;
1418 » codec->idle_bias_off = 1; 1402 » codec->dapm.idle_bias_off = 1;
1419 dac33->codec = codec; 1403 dac33->codec = codec;
1420 1404
1421 /* Read the tlv320dac33 ID registers */ 1405 /* Read the tlv320dac33 ID registers */
1422 ret = dac33_hard_power(codec, 1); 1406 ret = dac33_hard_power(codec, 1);
1423 if (ret != 0) { 1407 if (ret != 0) {
1424 dev_err(codec->dev, "Failed to power up codec: %d\n", ret); 1408 dev_err(codec->dev, "Failed to power up codec: %d\n", ret);
1425 goto err_power; 1409 goto err_power;
1426 } 1410 }
1427 ret = dac33_read_id(codec); 1411 ret = dac33_read_id(codec);
1428 dac33_hard_power(codec, 0); 1412 dac33_hard_power(codec, 0);
(...skipping 23 matching lines...) Expand all
1452 return -ENOMEM; 1436 return -ENOMEM;
1453 } 1437 }
1454 1438
1455 INIT_WORK(&dac33->work, dac33_work); 1439 INIT_WORK(&dac33->work, dac33_work);
1456 } 1440 }
1457 } 1441 }
1458 1442
1459 snd_soc_add_controls(codec, dac33_snd_controls, 1443 snd_soc_add_controls(codec, dac33_snd_controls,
1460 ARRAY_SIZE(dac33_snd_controls)); 1444 ARRAY_SIZE(dac33_snd_controls));
1461 /* Only add the FIFO controls, if we have valid IRQ number */ 1445 /* Only add the FIFO controls, if we have valid IRQ number */
1462 » if (dac33->irq >= 0) { 1446 » if (dac33->irq >= 0)
1463 snd_soc_add_controls(codec, dac33_mode_snd_controls, 1447 snd_soc_add_controls(codec, dac33_mode_snd_controls,
1464 ARRAY_SIZE(dac33_mode_snd_controls)); 1448 ARRAY_SIZE(dac33_mode_snd_controls));
1465 » » /* FIFO usage controls only, if autoio config is not selected */ 1449
1466 » » if (!dac33->auto_fifo_config)
1467 » » » snd_soc_add_controls(codec, dac33_fifo_snd_controls,
1468 » » » » » ARRAY_SIZE(dac33_fifo_snd_controls));
1469 » }
1470 dac33_add_widgets(codec); 1450 dac33_add_widgets(codec);
1471 1451
1472 err_power: 1452 err_power:
1473 return ret; 1453 return ret;
1474 } 1454 }
1475 1455
1476 static int dac33_soc_remove(struct snd_soc_codec *codec) 1456 static int dac33_soc_remove(struct snd_soc_codec *codec)
1477 { 1457 {
1478 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); 1458 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1479 1459
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1508 .reg_word_size = sizeof(u8), 1488 .reg_word_size = sizeof(u8),
1509 .reg_cache_default = dac33_reg, 1489 .reg_cache_default = dac33_reg,
1510 .probe = dac33_soc_probe, 1490 .probe = dac33_soc_probe,
1511 .remove = dac33_soc_remove, 1491 .remove = dac33_soc_remove,
1512 .suspend = dac33_soc_suspend, 1492 .suspend = dac33_soc_suspend,
1513 .resume = dac33_soc_resume, 1493 .resume = dac33_soc_resume,
1514 }; 1494 };
1515 1495
1516 #define DAC33_RATES (SNDRV_PCM_RATE_44100 | \ 1496 #define DAC33_RATES (SNDRV_PCM_RATE_44100 | \
1517 SNDRV_PCM_RATE_48000) 1497 SNDRV_PCM_RATE_48000)
1518 #define DAC33_FORMATS» SNDRV_PCM_FMTBIT_S16_LE 1498 #define DAC33_FORMATS» (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1519 1499
1520 static struct snd_soc_dai_ops dac33_dai_ops = { 1500 static struct snd_soc_dai_ops dac33_dai_ops = {
1521 .startup = dac33_startup, 1501 .startup = dac33_startup,
1522 .shutdown = dac33_shutdown, 1502 .shutdown = dac33_shutdown,
1523 .hw_params = dac33_hw_params, 1503 .hw_params = dac33_hw_params,
1524 .trigger = dac33_pcm_trigger, 1504 .trigger = dac33_pcm_trigger,
1525 .delay = dac33_dai_delay, 1505 .delay = dac33_dai_delay,
1526 .set_sysclk = dac33_set_dai_sysclk, 1506 .set_sysclk = dac33_set_dai_sysclk,
1527 .set_fmt = dac33_set_dai_fmt, 1507 .set_fmt = dac33_set_dai_fmt,
1528 }; 1508 };
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1556 return -ENOMEM; 1536 return -ENOMEM;
1557 1537
1558 dac33->control_data = client; 1538 dac33->control_data = client;
1559 mutex_init(&dac33->mutex); 1539 mutex_init(&dac33->mutex);
1560 spin_lock_init(&dac33->lock); 1540 spin_lock_init(&dac33->lock);
1561 1541
1562 i2c_set_clientdata(client, dac33); 1542 i2c_set_clientdata(client, dac33);
1563 1543
1564 dac33->power_gpio = pdata->power_gpio; 1544 dac33->power_gpio = pdata->power_gpio;
1565 dac33->burst_bclkdiv = pdata->burst_bclkdiv; 1545 dac33->burst_bclkdiv = pdata->burst_bclkdiv;
1566 /* Pre calculate the burst rate */
1567 dac33->burst_rate = BURST_BASEFREQ_HZ / dac33->burst_bclkdiv / 32;
1568 dac33->keep_bclk = pdata->keep_bclk; 1546 dac33->keep_bclk = pdata->keep_bclk;
1569 dac33->auto_fifo_config = pdata->auto_fifo_config;
1570 dac33->mode1_latency = pdata->mode1_latency; 1547 dac33->mode1_latency = pdata->mode1_latency;
1571 if (!dac33->mode1_latency) 1548 if (!dac33->mode1_latency)
1572 dac33->mode1_latency = 10000; /* 10ms */ 1549 dac33->mode1_latency = 10000; /* 10ms */
1573 dac33->irq = client->irq; 1550 dac33->irq = client->irq;
1574 dac33->nsample = NSAMPLE_MAX;
1575 dac33->nsample_max = NSAMPLE_MAX;
1576 dac33->uthr = MODE7_UTHR;
1577 /* Disable FIFO use by default */ 1551 /* Disable FIFO use by default */
1578 dac33->fifo_mode = DAC33_FIFO_BYPASS; 1552 dac33->fifo_mode = DAC33_FIFO_BYPASS;
1579 1553
1580 /* Check if the reset GPIO number is valid and request it */ 1554 /* Check if the reset GPIO number is valid and request it */
1581 if (dac33->power_gpio >= 0) { 1555 if (dac33->power_gpio >= 0) {
1582 ret = gpio_request(dac33->power_gpio, "tlv320dac33 reset"); 1556 ret = gpio_request(dac33->power_gpio, "tlv320dac33 reset");
1583 if (ret < 0) { 1557 if (ret < 0) {
1584 dev_err(&client->dev, 1558 dev_err(&client->dev,
1585 "Failed to request reset GPIO (%d)\n", 1559 "Failed to request reset GPIO (%d)\n",
1586 dac33->power_gpio); 1560 dac33->power_gpio);
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1667 static void __exit dac33_module_exit(void) 1641 static void __exit dac33_module_exit(void)
1668 { 1642 {
1669 i2c_del_driver(&tlv320dac33_i2c_driver); 1643 i2c_del_driver(&tlv320dac33_i2c_driver);
1670 } 1644 }
1671 module_exit(dac33_module_exit); 1645 module_exit(dac33_module_exit);
1672 1646
1673 1647
1674 MODULE_DESCRIPTION("ASoC TLV320DAC33 codec driver"); 1648 MODULE_DESCRIPTION("ASoC TLV320DAC33 codec driver");
1675 MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@nokia.com>"); 1649 MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@nokia.com>");
1676 MODULE_LICENSE("GPL"); 1650 MODULE_LICENSE("GPL");
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