(early draft) Strict mode - throw exception on assignment to read only property.

src/arm/codegen-arm.cc

 // Copyright 2010 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 3269 matching lines @@
       // context slot declaration, but we cannot initialize it at the
       // same time, because the const declaration may be at the end of
       // the eval code (sigh...) and the const variable may have been
       // used before (where its value is 'undefined'). Thus, we can only
       // do the initialization when we actually encounter the expression
       // and when the expression operands are defined and valid, and
       // thus we need the split into 2 operations: declaration of the
       // context slot followed by initialization.
       frame_->CallRuntime(Runtime::kInitializeConstContextSlot, 3);
     } else {
-      frame_->CallRuntime(Runtime::kStoreContextSlot, 3);
+      frame_->EmitPush(Operand(Smi::FromInt(strict_mode_flag())));
+      frame_->CallRuntime(Runtime::kStoreContextSlot, 4);
     }
     // Storing a variable must keep the (new) value on the expression
     // stack. This is necessary for compiling assignment expressions.
     frame_->EmitPush(r0);
 
   } else {
     ASSERT(!slot->var()->is_dynamic());
     Register scratch = VirtualFrame::scratch0();
     Register scratch2 = VirtualFrame::scratch1();
 
@@ skipping 329 matching lines @@
             frame_->Drop();
           }
           break;
         }
         // else fall through
       case ObjectLiteral::Property::PROTOTYPE: {
         frame_->Dup();
         Load(key);
         Load(value);
         if (property->emit_store()) {
-          frame_->CallRuntime(Runtime::kSetProperty, 3);
+          frame_->EmitPush(Operand(Smi::FromInt(NONE)));  // PropertyAttributes
+          frame_->CallRuntime(Runtime::kSetProperty, 4);
         } else {
           frame_->Drop(3);
         }
         break;
       }
       case ObjectLiteral::Property::SETTER: {
         frame_->Dup();
         Load(key);
         frame_->EmitPush(Operand(Smi::FromInt(1)));
         Load(value);
@@ skipping 3016 matching lines @@
     // deferred code.
     __ BlockConstPoolFor(1);
   }
 }
 
 
 class DeferredReferenceSetKeyedValue: public DeferredCode {
  public:
   DeferredReferenceSetKeyedValue(Register value,
                                  Register key,
-                                 Register receiver)
-      : value_(value), key_(key), receiver_(receiver) {
+                                 Register receiver,
+                                 StrictModeFlag strict)
+      : value_(value), key_(key), receiver_(receiver), strict_(strict) {
     set_comment("[ DeferredReferenceSetKeyedValue");
   }
 
   virtual void Generate();
 
  private:
   Register value_;
   Register key_;
   Register receiver_;
+  StrictModeFlag strict_;
 };
 
 
 void DeferredReferenceSetKeyedValue::Generate() {
   Register scratch1 = VirtualFrame::scratch0();
   Register scratch2 = VirtualFrame::scratch1();
   __ DecrementCounter(&Counters::keyed_store_inline, 1, scratch1, scratch2);
   __ IncrementCounter(
       &Counters::keyed_store_inline_miss, 1, scratch1, scratch2);
 
   // Ensure value in r0, key in r1 and receiver in r2 to match keyed store ic
   // calling convention.
   if (value_.is(r1)) {
     __ Swap(r0, r1, ip);
   }
   ASSERT(receiver_.is(r2));
 
   // The rest of the instructions in the deferred code must be together.
   { Assembler::BlockConstPoolScope block_const_pool(masm_);
     // Call keyed store IC. It has the arguments value, key and receiver in r0,
     // r1 and r2.
-    Handle<Code> ic(Builtins::builtin(Builtins::KeyedStoreIC_Initialize));
+    Handle<Code> ic(Builtins::builtin(
+        strict_ == kStrictMode ? Builtins::KeyedStoreIC_Initialize_Strict
+                               : Builtins::KeyedStoreIC_Initialize));
     __ Call(ic, RelocInfo::CODE_TARGET);
     // The call must be followed by a nop instruction to indicate that the
     // keyed store has been inlined.
     __ MarkCode(MacroAssembler::PROPERTY_ACCESS_INLINED);
 
     // Block the constant pool for one more instruction after leaving this
     // constant pool block scope to include the branch instruction ending the
     // deferred code.
     __ BlockConstPoolFor(1);
   }
 }
 
 
 class DeferredReferenceSetNamedValue: public DeferredCode {
  public:
   DeferredReferenceSetNamedValue(Register value,
                                  Register receiver,
-                                 Handle<String> name)
-      : value_(value), receiver_(receiver), name_(name) {
+                                 Handle<String> name,
+                                 StrictModeFlag strict)
+      : value_(value), receiver_(receiver), name_(name), strict_(strict) {
     set_comment("[ DeferredReferenceSetNamedValue");
   }
 
   virtual void Generate();
 
  private:
   Register value_;
   Register receiver_;
   Handle<String> name_;
+  StrictModeFlag strict_;
 };
 
 
 // Takes value in r0, receiver in r1 and returns the result (the
 // value) in r0.
 void DeferredReferenceSetNamedValue::Generate() {
   // Record the entry frame and spill.
   VirtualFrame copied_frame(*frame_state()->frame());
   copied_frame.SpillAll();
 
   // Ensure value in r0, receiver in r1 to match store ic calling
   // convention.
   ASSERT(value_.is(r0) && receiver_.is(r1));
   __ mov(r2, Operand(name_));
 
   // The rest of the instructions in the deferred code must be together.
   { Assembler::BlockConstPoolScope block_const_pool(masm_);
     // Call keyed store IC. It has the arguments value, key and receiver in r0,
     // r1 and r2.
-    Handle<Code> ic(Builtins::builtin(Builtins::StoreIC_Initialize));
+    Handle<Code> ic(Builtins::builtin(
+        strict_ == kStrictMode ? Builtins::StoreIC_Initialize_Strict
+                               : Builtins::StoreIC_Initialize));
     __ Call(ic, RelocInfo::CODE_TARGET);
     // The call must be followed by a nop instruction to indicate that the
     // named store has been inlined.
     __ MarkCode(MacroAssembler::PROPERTY_ACCESS_INLINED);
 
     // Go back to the frame we entered with. The instructions
     // generated by this merge are skipped over by the inline store
     // patching mechanism when looking for the branch instruction that
     // tells it where the code to patch is.
     copied_frame.MergeTo(frame_state()->frame());
@@ skipping 168 matching lines @@
     // Inline the in-object property case.
     JumpTarget slow, done;
 
     // Get the value and receiver from the stack.
     frame()->PopToR0();
     Register value = r0;
     frame()->PopToR1();
     Register receiver = r1;
 
     DeferredReferenceSetNamedValue* deferred =
-        new DeferredReferenceSetNamedValue(value, receiver, name);
+        new DeferredReferenceSetNamedValue(
+          value, receiver, name, strict_mode_flag());
 
     // Check that the receiver is a heap object.
     __ tst(receiver, Operand(kSmiTagMask));
     deferred->Branch(eq);
 
     // The following instructions are the part of the inlined
     // in-object property store code which can be patched. Therefore
     // the exact number of instructions generated must be fixed, so
     // the constant pool is blocked while generating this code.
     { Assembler::BlockConstPoolScope block_const_pool(masm_);
@@ skipping 165 matching lines @@
     VirtualFrame::SpilledScope spilled(frame_);
     Register receiver = r2;
     frame_->EmitPop(receiver);
 
 #ifdef DEBUG
     bool we_remembered_the_write_barrier = value_is_harmless;
 #endif
 
     // The deferred code expects value, key and receiver in registers.
     DeferredReferenceSetKeyedValue* deferred =
-        new DeferredReferenceSetKeyedValue(value, key, receiver);
+        new DeferredReferenceSetKeyedValue(
+          value, key, receiver, strict_mode_flag());
 
     // Check that the value is a smi. As this inlined code does not set the
     // write barrier it is only possible to store smi values.
     if (!value_is_harmless) {
       // If the value is not likely to be a Smi then let's test the fixed array
       // for new space instead.  See below.
       if (wb_info == LIKELY_SMI) {
         __ tst(value, Operand(kSmiTagMask));
         deferred->Branch(ne);
 #ifdef DEBUG
@@ skipping 64 matching lines @@
 
       // Make sure that the expected number of instructions are generated.
       ASSERT_EQ(kInlinedKeyedStoreInstructionsAfterPatch,
                 masm_->InstructionsGeneratedSince(&check_inlined_codesize));
     }
 
     ASSERT(we_remembered_the_write_barrier);
 
     deferred->BindExit();
   } else {
-    frame()->CallKeyedStoreIC();
+    frame()->CallKeyedStoreIC(strict_mode_flag());
   }
 }
 
 
 #ifdef DEBUG
 bool CodeGenerator::HasValidEntryRegisters() { return true; }
 #endif
 
 
 #undef __
@@ skipping 147 matching lines @@
                BinaryOpIC::GetName(runtime_operands_type_));
   return name_;
 }
 
 
 #undef __
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM