| OLD | NEW |
| 1 /* | 1 /* |
| 2 * arch/arm/mach-tegra/board-seaboard-pinmux.c | 2 * arch/arm/mach-tegra/board-seaboard-pinmux.c |
| 3 * | 3 * |
| 4 * Copyright (C) 2010 NVIDIA Corporation | 4 * Copyright (C) 2010 NVIDIA Corporation |
| 5 * | 5 * |
| 6 * This software is licensed under the terms of the GNU General Public | 6 * This software is licensed under the terms of the GNU General Public |
| 7 * License version 2, as published by the Free Software Foundation, and | 7 * License version 2, as published by the Free Software Foundation, and |
| 8 * may be copied, distributed, and modified under those terms. | 8 * may be copied, distributed, and modified under those terms. |
| 9 * | 9 * |
| 10 * This program is distributed in the hope that it will be useful, | 10 * This program is distributed in the hope that it will be useful, |
| (...skipping 111 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 122 {TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, | 122 {TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, |
| 123 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_NORMAL}, | 123 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_NORMAL}, |
| 124 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_TRISTATE}, | 124 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_TRISTATE}, |
| 125 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TE
GRA_TRI_TRISTATE}, | 125 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TE
GRA_TRI_TRISTATE}, |
| 126 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, | 126 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, |
| 127 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, | 127 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, |
| 128 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, | 128 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, |
| 129 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, | 129 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, |
| 130 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_TRISTATE}, | 130 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_TRISTATE}, |
| 131 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TE
GRA_TRI_TRISTATE}, | 131 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TE
GRA_TRI_TRISTATE}, |
| 132 » {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TE
GRA_TRI_TRISTATE}, | 132 » {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_TRISTATE}, |
| 133 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TE
GRA_TRI_TRISTATE}, | 133 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TE
GRA_TRI_TRISTATE}, |
| 134 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TE
GRA_TRI_TRISTATE}, | 134 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TE
GRA_TRI_TRISTATE}, |
| 135 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TE
GRA_TRI_TRISTATE}, | 135 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TE
GRA_TRI_TRISTATE}, |
| 136 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_TRISTATE}, | 136 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_TRISTATE}, |
| 137 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_TRISTATE}, | 137 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_TRISTATE}, |
| 138 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_NORMAL}, | 138 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_NORMAL}, |
| 139 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_NORMAL}, | 139 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TE
GRA_TRI_NORMAL}, |
| 140 {TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, | 140 {TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, |
| 141 {TEGRA_PINGROUP_UAD, TEGRA_MUX_IRDA, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, | 141 {TEGRA_PINGROUP_UAD, TEGRA_MUX_IRDA, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, |
| 142 {TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, | 142 {TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, |
| (...skipping 10 matching lines...) Expand all Loading... |
| 153 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, | 153 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TE
GRA_TRI_NORMAL}, |
| 154 }; | 154 }; |
| 155 | 155 |
| 156 void __init seaboard_pinmux_init(void) | 156 void __init seaboard_pinmux_init(void) |
| 157 { | 157 { |
| 158 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); | 158 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); |
| 159 | 159 |
| 160 tegra_drive_pinmux_config_table(seaboard_drive_pinmux, | 160 tegra_drive_pinmux_config_table(seaboard_drive_pinmux, |
| 161 ARRAY_SIZE(seaboard_drive_pinmux)); | 161 ARRAY_SIZE(seaboard_drive_pinmux)); |
| 162 } | 162 } |
| OLD | NEW |