ARM: Enable loads and stores of VFP registers with offsets >= 1024 bytes.

ARM: Enable loads and stores of VFP registers with offsets >= 1024 bytes.

Committed: http://code.google.com/p/v8/source/detail?r=6830

[Rodolph Perfetta, 2011-02-16 16:48:54]

drive by commments. By the way this patch is also part of issue 6311010.

http://codereview.chromium.org/6530002/diff/1/src/arm/assembler-arm.cc
File src/arm/assembler-arm.cc (right):

http://codereview.chromium.org/6530002/diff/1/src/arm/assembler-arm.cc#newcod...
src/arm/assembler-arm.cc:1860: mov(ip, Operand(offset));
The offset may be encodable in an add/sub immediate, so it would be better not
to move offset into ip and let the assembler decide: add(ip, base,
Operand(offset)); ...

http://codereview.chromium.org/6530002/diff/1/src/arm/assembler-arm.cc#newcod...
src/arm/assembler-arm.cc:1905: mov(ip, Operand(offset));
ditto.

http://codereview.chromium.org/6530002/diff/1/src/arm/assembler-arm.cc#newcod...
src/arm/assembler-arm.cc:1947: mov(ip, Operand(offset));
ditto.

http://codereview.chromium.org/6530002/diff/1/src/arm/assembler-arm.cc#newcod...
src/arm/assembler-arm.cc:1991: mov(ip, Operand(offset));
ditto.

http://codereview.chromium.org/6530002/diff/1/src/arm/assembler-arm.h
File src/arm/assembler-arm.h (right):

http://codereview.chromium.org/6530002/diff/1/src/arm/assembler-arm.h#newcode450
src/arm/assembler-arm.h:450: bool OffsetIsEncodable() const {
load/store word and byte support a 12bits offset but load/store halfword and
signed byte support a smaller offset. Furthermore this patch add support for
vldr/vstr and there the offset is 8bits (shifted left by 2 to get the value).

[Karl Klose, 2011-02-17 09:21:37]

LGTM with Rodolph's comments addressed.

[William Hesse, 2011-02-17 11:27:29]

http://codereview.chromium.org/6530002/diff/1/src/arm/assembler-arm.cc
File src/arm/assembler-arm.cc (right):

http://codereview.chromium.org/6530002/diff/1/src/arm/assembler-arm.cc#newcod...
src/arm/assembler-arm.cc:1860: mov(ip, Operand(offset));
On 2011/02/16 16:48:54, Rodolph Perfetta wrote:
> The offset may be encodable in an add/sub immediate, so it would be better not
> to move offset into ip and let the assembler decide: add(ip, base,
> Operand(offset)); ...

Done.

http://codereview.chromium.org/6530002/diff/1/src/arm/assembler-arm.h
File src/arm/assembler-arm.h (right):

http://codereview.chromium.org/6530002/diff/1/src/arm/assembler-arm.h#newcode450
src/arm/assembler-arm.h:450: bool OffsetIsEncodable() const {
Changed name to OffsetIsUint12Encodable On 2011/02/16 16:48:54, Rodolph Perfetta
wrote:
> load/store word and byte support a 12bits offset but load/store halfword and
> signed byte support a smaller offset. Furthermore this patch add support for
> vldr/vstr and there the offset is 8bits (shifted left by 2 to get the value).