| OLD | NEW |
|---|
| (Empty) | |
| 1 --- |
| 2 harness/main.c | 8 + |
| 3 src/libaio.h | 34 +++++++ |
| 4 src/syscall-arm.h | 116 ++++++++++++++++++++++++++ |
| 5 src/syscall-m68k.h | 78 +++++++++++++++++ |
| 6 src/syscall-mips.h | 223 +++++++++++++++++++++++++++++++++++++++++++++++++++ |
| 7 src/syscall-parisc.h | 146 +++++++++++++++++++++++++++++++++ |
| 8 src/syscall-sparc.h | 130 +++++++++++++++++++++++++++++ |
| 9 src/syscall.h | 10 ++ |
| 10 8 files changed, 744 insertions(+), 1 deletion(-) |
| 11 |
| 12 --- /dev/null |
| 13 +++ b/src/syscall-m68k.h |
| 14 @@ -0,0 +1,78 @@ |
| 15 +#define __NR_io_setup 241 |
| 16 +#define __NR_io_destroy 242 |
| 17 +#define __NR_io_getevents 243 |
| 18 +#define __NR_io_submit 244 |
| 19 +#define __NR_io_cancel 245 |
| 20 + |
| 21 +#define io_syscall1(type,fname,sname,atype,a) \ |
| 22 +type fname(atype a) \ |
| 23 +{ \ |
| 24 +register long __res __asm__ ("%d0") = __NR_##sname; \ |
| 25 +register long __a __asm__ ("%d1") = (long)(a); \ |
| 26 +__asm__ __volatile__ ("trap #0" \ |
| 27 + : "+d" (__res) \ |
| 28 + : "d" (__a) ); \ |
| 29 +return (type) __res; \ |
| 30 +} |
| 31 + |
| 32 +#define io_syscall2(type,fname,sname,atype,a,btype,b) \ |
| 33 +type fname(atype a,btype b) \ |
| 34 +{ \ |
| 35 +register long __res __asm__ ("%d0") = __NR_##sname; \ |
| 36 +register long __a __asm__ ("%d1") = (long)(a); \ |
| 37 +register long __b __asm__ ("%d2") = (long)(b); \ |
| 38 +__asm__ __volatile__ ("trap #0" \ |
| 39 + : "+d" (__res) \ |
| 40 + : "d" (__a), "d" (__b) \ |
| 41 + ); \ |
| 42 +return (type) __res; \ |
| 43 +} |
| 44 + |
| 45 +#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \ |
| 46 +type fname(atype a,btype b,ctype c) \ |
| 47 +{ \ |
| 48 +register long __res __asm__ ("%d0") = __NR_##sname; \ |
| 49 +register long __a __asm__ ("%d1") = (long)(a); \ |
| 50 +register long __b __asm__ ("%d2") = (long)(b); \ |
| 51 +register long __c __asm__ ("%d3") = (long)(c); \ |
| 52 +__asm__ __volatile__ ("trap #0" \ |
| 53 + : "+d" (__res) \ |
| 54 + : "d" (__a), "d" (__b), \ |
| 55 + "d" (__c) \ |
| 56 + ); \ |
| 57 +return (type) __res; \ |
| 58 +} |
| 59 + |
| 60 +#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \ |
| 61 +type fname (atype a, btype b, ctype c, dtype d) \ |
| 62 +{ \ |
| 63 +register long __res __asm__ ("%d0") = __NR_##sname; \ |
| 64 +register long __a __asm__ ("%d1") = (long)(a); \ |
| 65 +register long __b __asm__ ("%d2") = (long)(b); \ |
| 66 +register long __c __asm__ ("%d3") = (long)(c); \ |
| 67 +register long __d __asm__ ("%d4") = (long)(d); \ |
| 68 +__asm__ __volatile__ ("trap #0" \ |
| 69 + : "+d" (__res) \ |
| 70 + : "d" (__a), "d" (__b), \ |
| 71 + "d" (__c), "d" (__d) \ |
| 72 + ); \ |
| 73 +return (type) __res; \ |
| 74 +} |
| 75 + |
| 76 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ |
| 77 +type fname (atype a,btype b,ctype c,dtype d,etype e) \ |
| 78 +{ \ |
| 79 +register long __res __asm__ ("%d0") = __NR_##sname; \ |
| 80 +register long __a __asm__ ("%d1") = (long)(a); \ |
| 81 +register long __b __asm__ ("%d2") = (long)(b); \ |
| 82 +register long __c __asm__ ("%d3") = (long)(c); \ |
| 83 +register long __d __asm__ ("%d4") = (long)(d); \ |
| 84 +register long __e __asm__ ("%d5") = (long)(e); \ |
| 85 +__asm__ __volatile__ ("trap #0" \ |
| 86 + : "+d" (__res) \ |
| 87 + : "d" (__a), "d" (__b), \ |
| 88 + "d" (__c), "d" (__d), "d" (__e) \ |
| 89 + ); \ |
| 90 +return (type) __res; \ |
| 91 +} |
| 92 + |
| 93 --- /dev/null |
| 94 +++ b/src/syscall-sparc.h |
| 95 @@ -0,0 +1,130 @@ |
| 96 +/* $Id: unistd.h,v 1.74 2002/02/08 03:57:18 davem Exp $ */ |
| 97 + |
| 98 +/* |
| 99 + * System calls under the Sparc. |
| 100 + * |
| 101 + * Don't be scared by the ugly clobbers, it is the only way I can |
| 102 + * think of right now to force the arguments into fixed registers |
| 103 + * before the trap into the system call with gcc 'asm' statements. |
| 104 + * |
| 105 + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) |
| 106 + * |
| 107 + * SunOS compatibility based upon preliminary work which is: |
| 108 + * |
| 109 + * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu) |
| 110 + */ |
| 111 + |
| 112 + |
| 113 +#define __NR_io_setup 268 |
| 114 +#define __NR_io_destroy 269 |
| 115 +#define __NR_io_submit 270 |
| 116 +#define __NR_io_cancel 271 |
| 117 +#define __NR_io_getevents 272 |
| 118 + |
| 119 + |
| 120 +#define io_syscall1(type,fname,sname,type1,arg1) \ |
| 121 +type fname(type1 arg1) \ |
| 122 +{ \ |
| 123 +long __res; \ |
| 124 +register long __g1 __asm__ ("g1") = __NR_##sname; \ |
| 125 +register long __o0 __asm__ ("o0") = (long)(arg1); \ |
| 126 +__asm__ __volatile__ ("t 0x10\n\t" \ |
| 127 + "bcc 1f\n\t" \ |
| 128 + "mov %%o0, %0\n\t" \ |
| 129 + "sub %%g0, %%o0, %0\n\t" \ |
| 130 + "1:\n\t" \ |
| 131 + : "=r" (__res), "=&r" (__o0) \ |
| 132 + : "1" (__o0), "r" (__g1) \ |
| 133 + : "cc"); \ |
| 134 +if (__res < -255 || __res >= 0) \ |
| 135 + return (type) __res; \ |
| 136 +return -1; \ |
| 137 +} |
| 138 + |
| 139 +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \ |
| 140 +type fname(type1 arg1,type2 arg2) \ |
| 141 +{ \ |
| 142 +long __res; \ |
| 143 +register long __g1 __asm__ ("g1") = __NR_##sname; \ |
| 144 +register long __o0 __asm__ ("o0") = (long)(arg1); \ |
| 145 +register long __o1 __asm__ ("o1") = (long)(arg2); \ |
| 146 +__asm__ __volatile__ ("t 0x10\n\t" \ |
| 147 + "bcc 1f\n\t" \ |
| 148 + "mov %%o0, %0\n\t" \ |
| 149 + "sub %%g0, %%o0, %0\n\t" \ |
| 150 + "1:\n\t" \ |
| 151 + : "=r" (__res), "=&r" (__o0) \ |
| 152 + : "1" (__o0), "r" (__o1), "r" (__g1) \ |
| 153 + : "cc"); \ |
| 154 +if (__res < -255 || __res >= 0) \ |
| 155 + return (type) __res; \ |
| 156 +return -1; \ |
| 157 +} |
| 158 + |
| 159 +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \ |
| 160 +type fname(type1 arg1,type2 arg2,type3 arg3) \ |
| 161 +{ \ |
| 162 +long __res; \ |
| 163 +register long __g1 __asm__ ("g1") = __NR_##sname; \ |
| 164 +register long __o0 __asm__ ("o0") = (long)(arg1); \ |
| 165 +register long __o1 __asm__ ("o1") = (long)(arg2); \ |
| 166 +register long __o2 __asm__ ("o2") = (long)(arg3); \ |
| 167 +__asm__ __volatile__ ("t 0x10\n\t" \ |
| 168 + "bcc 1f\n\t" \ |
| 169 + "mov %%o0, %0\n\t" \ |
| 170 + "sub %%g0, %%o0, %0\n\t" \ |
| 171 + "1:\n\t" \ |
| 172 + : "=r" (__res), "=&r" (__o0) \ |
| 173 + : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__g1) \ |
| 174 + : "cc"); \ |
| 175 +if (__res < -255 || __res>=0) \ |
| 176 + return (type) __res; \ |
| 177 +return -1; \ |
| 178 +} |
| 179 + |
| 180 +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg
4) \ |
| 181 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ |
| 182 +{ \ |
| 183 +long __res; \ |
| 184 +register long __g1 __asm__ ("g1") = __NR_##sname; \ |
| 185 +register long __o0 __asm__ ("o0") = (long)(arg1); \ |
| 186 +register long __o1 __asm__ ("o1") = (long)(arg2); \ |
| 187 +register long __o2 __asm__ ("o2") = (long)(arg3); \ |
| 188 +register long __o3 __asm__ ("o3") = (long)(arg4); \ |
| 189 +__asm__ __volatile__ ("t 0x10\n\t" \ |
| 190 + "bcc 1f\n\t" \ |
| 191 + "mov %%o0, %0\n\t" \ |
| 192 + "sub %%g0, %%o0, %0\n\t" \ |
| 193 + "1:\n\t" \ |
| 194 + : "=r" (__res), "=&r" (__o0) \ |
| 195 + : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__g
1) \ |
| 196 + : "cc"); \ |
| 197 +if (__res < -255 || __res>=0) \ |
| 198 + return (type) __res; \ |
| 199 +return -1; \ |
| 200 +} |
| 201 + |
| 202 +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg
4, \ |
| 203 + type5,arg5) \ |
| 204 +type fname(type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \ |
| 205 +{ \ |
| 206 +long __res; \ |
| 207 +register long __g1 __asm__ ("g1") = __NR_##sname; \ |
| 208 +register long __o0 __asm__ ("o0") = (long)(arg1); \ |
| 209 +register long __o1 __asm__ ("o1") = (long)(arg2); \ |
| 210 +register long __o2 __asm__ ("o2") = (long)(arg3); \ |
| 211 +register long __o3 __asm__ ("o3") = (long)(arg4); \ |
| 212 +register long __o4 __asm__ ("o4") = (long)(arg5); \ |
| 213 +__asm__ __volatile__ ("t 0x10\n\t" \ |
| 214 + "bcc 1f\n\t" \ |
| 215 + "mov %%o0, %0\n\t" \ |
| 216 + "sub %%g0, %%o0, %0\n\t" \ |
| 217 + "1:\n\t" \ |
| 218 + : "=r" (__res), "=&r" (__o0) \ |
| 219 + : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__o
4), "r" (__g1) \ |
| 220 + : "cc"); \ |
| 221 +if (__res < -255 || __res>=0) \ |
| 222 + return (type) __res; \ |
| 223 +return -1; \ |
| 224 +} |
| 225 + |
| 226 --- a/src/syscall.h |
| 227 +++ b/src/syscall.h |
| 228 @@ -22,6 +22,16 @@ |
| 229 #include "syscall-s390.h" |
| 230 #elif defined(__alpha__) |
| 231 #include "syscall-alpha.h" |
| 232 +#elif defined(__arm__) |
| 233 +#include "syscall-arm.h" |
| 234 +#elif defined(__m68k__) |
| 235 +#include "syscall-m68k.h" |
| 236 +#elif defined(__sparc__) |
| 237 +#include "syscall-sparc.h" |
| 238 +#elif defined(__hppa__) |
| 239 +#include "syscall-parisc.h" |
| 240 +#elif defined(__mips__) |
| 241 +#include "syscall-mips.h" |
| 242 #else |
| 243 #error "add syscall-arch.h" |
| 244 #endif |
| 245 --- /dev/null |
| 246 +++ b/src/syscall-mips.h |
| 247 @@ -0,0 +1,223 @@ |
| 248 +/* |
| 249 + * This file is subject to the terms and conditions of the GNU General Public |
| 250 + * License. See the file "COPYING" in the main directory of this archive |
| 251 + * for more details. |
| 252 + * |
| 253 + * Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle |
| 254 + * Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
| 255 + * |
| 256 + * Changed system calls macros _syscall5 - _syscall7 to push args 5 to 7 onto |
| 257 + * the stack. Robin Farine for ACN S.A, Copyright (C) 1996 by ACN S.A |
| 258 + */ |
| 259 + |
| 260 +#ifndef _MIPS_SIM_ABI32 |
| 261 +#define _MIPS_SIM_ABI32 1 |
| 262 +#define _MIPS_SIM_NABI32 2 |
| 263 +#define _MIPS_SIM_ABI64 3 |
| 264 +#endif |
| 265 + |
| 266 +#if _MIPS_SIM == _MIPS_SIM_ABI32 |
| 267 + |
| 268 +/* |
| 269 + * Linux o32 style syscalls are in the range from 4000 to 4999. |
| 270 + */ |
| 271 +#define __NR_Linux 4000 |
| 272 +#define __NR_io_setup (__NR_Linux + 241) |
| 273 +#define __NR_io_destroy (__NR_Linux + 242) |
| 274 +#define __NR_io_getevents (__NR_Linux + 243) |
| 275 +#define __NR_io_submit (__NR_Linux + 244) |
| 276 +#define __NR_io_cancel (__NR_Linux + 245) |
| 277 + |
| 278 +#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ |
| 279 + |
| 280 +#if _MIPS_SIM == _MIPS_SIM_ABI64 |
| 281 + |
| 282 +/* |
| 283 + * Linux 64-bit syscalls are in the range from 5000 to 5999. |
| 284 + */ |
| 285 +#define __NR_Linux 5000 |
| 286 +#define __NR_io_setup (__NR_Linux + 200) |
| 287 +#define __NR_io_destroy (__NR_Linux + 201) |
| 288 +#define __NR_io_getevents (__NR_Linux + 202) |
| 289 +#define __NR_io_submit (__NR_Linux + 203) |
| 290 +#define __NR_io_cancel (__NR_Linux + 204) |
| 291 +#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ |
| 292 + |
| 293 +#if _MIPS_SIM == _MIPS_SIM_NABI32 |
| 294 + |
| 295 +/* |
| 296 + * Linux N32 syscalls are in the range from 6000 to 6999. |
| 297 + */ |
| 298 +#define __NR_Linux 6000 |
| 299 +#define __NR_io_setup (__NR_Linux + 200) |
| 300 +#define __NR_io_destroy (__NR_Linux + 201) |
| 301 +#define __NR_io_getevents (__NR_Linux + 202) |
| 302 +#define __NR_io_submit (__NR_Linux + 203) |
| 303 +#define __NR_io_cancel (__NR_Linux + 204) |
| 304 +#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ |
| 305 + |
| 306 +#define io_syscall1(type,fname,sname,atype,a) \ |
| 307 +type fname(atype a) \ |
| 308 +{ \ |
| 309 + register unsigned long __a0 asm("$4") = (unsigned long) a; \ |
| 310 + register unsigned long __a3 asm("$7"); \ |
| 311 + unsigned long __v0; \ |
| 312 + \ |
| 313 + __asm__ volatile ( \ |
| 314 + ".set\tnoreorder\n\t" \ |
| 315 + "li\t$2, %3\t\t\t# " #fname "\n\t" \ |
| 316 + "syscall\n\t" \ |
| 317 + "move\t%0, $2\n\t" \ |
| 318 + ".set\treorder" \ |
| 319 + : "=&r" (__v0), "=r" (__a3) \ |
| 320 + : "r" (__a0), "i" (__NR_##sname) \ |
| 321 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ |
| 322 + "memory"); \ |
| 323 + \ |
| 324 + if (__a3 == 0) \ |
| 325 + return (type) __v0; \ |
| 326 + return (type) -1; \ |
| 327 +} |
| 328 + |
| 329 +#define io_syscall2(type,fname,sname,atype,a,btype,b) \ |
| 330 +type fname(atype a, btype b) \ |
| 331 +{ \ |
| 332 + register unsigned long __a0 asm("$4") = (unsigned long) a; \ |
| 333 + register unsigned long __a1 asm("$5") = (unsigned long) b; \ |
| 334 + register unsigned long __a3 asm("$7"); \ |
| 335 + unsigned long __v0; \ |
| 336 + \ |
| 337 + __asm__ volatile ( \ |
| 338 + ".set\tnoreorder\n\t" \ |
| 339 + "li\t$2, %4\t\t\t# " #fname "\n\t" \ |
| 340 + "syscall\n\t" \ |
| 341 + "move\t%0, $2\n\t" \ |
| 342 + ".set\treorder" \ |
| 343 + : "=&r" (__v0), "=r" (__a3) \ |
| 344 + : "r" (__a0), "r" (__a1), "i" (__NR_##sname) \ |
| 345 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ |
| 346 + "memory"); \ |
| 347 + \ |
| 348 + if (__a3 == 0) \ |
| 349 + return (type) __v0; \ |
| 350 + return (type) -1; \ |
| 351 +} |
| 352 + |
| 353 +#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \ |
| 354 +type fname(atype a, btype b, ctype c) \ |
| 355 +{ \ |
| 356 + register unsigned long __a0 asm("$4") = (unsigned long) a; \ |
| 357 + register unsigned long __a1 asm("$5") = (unsigned long) b; \ |
| 358 + register unsigned long __a2 asm("$6") = (unsigned long) c; \ |
| 359 + register unsigned long __a3 asm("$7"); \ |
| 360 + unsigned long __v0; \ |
| 361 + \ |
| 362 + __asm__ volatile ( \ |
| 363 + ".set\tnoreorder\n\t" \ |
| 364 + "li\t$2, %5\t\t\t# " #fname "\n\t" \ |
| 365 + "syscall\n\t" \ |
| 366 + "move\t%0, $2\n\t" \ |
| 367 + ".set\treorder" \ |
| 368 + : "=&r" (__v0), "=r" (__a3) \ |
| 369 + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \ |
| 370 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ |
| 371 + "memory"); \ |
| 372 + \ |
| 373 + if (__a3 == 0) \ |
| 374 + return (type) __v0; \ |
| 375 + return (type) -1; \ |
| 376 +} |
| 377 + |
| 378 +#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \ |
| 379 +type fname(atype a, btype b, ctype c, dtype d) \ |
| 380 +{ \ |
| 381 + register unsigned long __a0 asm("$4") = (unsigned long) a; \ |
| 382 + register unsigned long __a1 asm("$5") = (unsigned long) b; \ |
| 383 + register unsigned long __a2 asm("$6") = (unsigned long) c; \ |
| 384 + register unsigned long __a3 asm("$7") = (unsigned long) d; \ |
| 385 + unsigned long __v0; \ |
| 386 + \ |
| 387 + __asm__ volatile ( \ |
| 388 + ".set\tnoreorder\n\t" \ |
| 389 + "li\t$2, %5\t\t\t# " #fname "\n\t" \ |
| 390 + "syscall\n\t" \ |
| 391 + "move\t%0, $2\n\t" \ |
| 392 + ".set\treorder" \ |
| 393 + : "=&r" (__v0), "+r" (__a3) \ |
| 394 + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \ |
| 395 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ |
| 396 + "memory"); \ |
| 397 + \ |
| 398 + if (__a3 == 0) \ |
| 399 + return (type) __v0; \ |
| 400 + return (type) -1; \ |
| 401 +} |
| 402 + |
| 403 +#if (_MIPS_SIM == _MIPS_SIM_ABI32) |
| 404 + |
| 405 +/* |
| 406 + * Using those means your brain needs more than an oil change ;-) |
| 407 + */ |
| 408 + |
| 409 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ |
| 410 +type fname(atype a, btype b, ctype c, dtype d, etype e) \ |
| 411 +{ \ |
| 412 + register unsigned long __a0 asm("$4") = (unsigned long) a; \ |
| 413 + register unsigned long __a1 asm("$5") = (unsigned long) b; \ |
| 414 + register unsigned long __a2 asm("$6") = (unsigned long) c; \ |
| 415 + register unsigned long __a3 asm("$7") = (unsigned long) d; \ |
| 416 + unsigned long __v0; \ |
| 417 + \ |
| 418 + __asm__ volatile ( \ |
| 419 + ".set\tnoreorder\n\t" \ |
| 420 + "lw\t$2, %6\n\t" \ |
| 421 + "subu\t$29, 32\n\t" \ |
| 422 + "sw\t$2, 16($29)\n\t" \ |
| 423 + "li\t$2, %5\t\t\t# " #fname "\n\t" \ |
| 424 + "syscall\n\t" \ |
| 425 + "move\t%0, $2\n\t" \ |
| 426 + "addiu\t$29, 32\n\t" \ |
| 427 + ".set\treorder" \ |
| 428 + : "=&r" (__v0), "+r" (__a3) \ |
| 429 + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname), \ |
| 430 + "m" ((unsigned long)e) \ |
| 431 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ |
| 432 + "memory"); \ |
| 433 + \ |
| 434 + if (__a3 == 0) \ |
| 435 + return (type) __v0; \ |
| 436 + return (type) -1; \ |
| 437 +} |
| 438 + |
| 439 +#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */ |
| 440 + |
| 441 +#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) |
| 442 + |
| 443 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ |
| 444 +type fname (atype a,btype b,ctype c,dtype d,etype e) \ |
| 445 +{ \ |
| 446 + register unsigned long __a0 asm("$4") = (unsigned long) a; \ |
| 447 + register unsigned long __a1 asm("$5") = (unsigned long) b; \ |
| 448 + register unsigned long __a2 asm("$6") = (unsigned long) c; \ |
| 449 + register unsigned long __a3 asm("$7") = (unsigned long) d; \ |
| 450 + register unsigned long __a4 asm("$8") = (unsigned long) e; \ |
| 451 + unsigned long __v0; \ |
| 452 + \ |
| 453 + __asm__ volatile ( \ |
| 454 + ".set\tnoreorder\n\t" \ |
| 455 + "li\t$2, %6\t\t\t# " #fname "\n\t" \ |
| 456 + "syscall\n\t" \ |
| 457 + "move\t%0, $2\n\t" \ |
| 458 + ".set\treorder" \ |
| 459 + : "=&r" (__v0), "+r" (__a3) \ |
| 460 + : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##sname) \ |
| 461 + : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ |
| 462 + "memory"); \ |
| 463 + \ |
| 464 + if (__a3 == 0) \ |
| 465 + return (type) __v0; \ |
| 466 + return (type) -1; \ |
| 467 +} |
| 468 + |
| 469 +#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */ |
| 470 + |
| 471 --- a/src/libaio.h |
| 472 +++ b/src/libaio.h |
| 473 @@ -73,6 +73,40 @@ typedef enum io_iocb_cmd { |
| 474 #define PADDED(x, y) unsigned y; x |
| 475 #define PADDEDptr(x, y) unsigned y; x |
| 476 #define PADDEDul(x, y) unsigned y; unsigned long x |
| 477 +#elif defined(__arm__) |
| 478 +# if defined (__ARMEB__) /* big endian, 32 bits */ |
| 479 +#define PADDED(x, y) unsigned y; x |
| 480 +#define PADDEDptr(x, y) unsigned y; x |
| 481 +#define PADDEDul(x, y) unsigned y; unsigned long x |
| 482 +# else /* little endian, 32 bits */ |
| 483 +#define PADDED(x, y) x; unsigned y |
| 484 +#define PADDEDptr(x, y) x; unsigned y |
| 485 +#define PADDEDul(x, y) unsigned long x; unsigned y |
| 486 +# endif |
| 487 +#elif defined(__m68k__) /* big endian, 32 bits */ |
| 488 +#define PADDED(x, y) unsigned y; x |
| 489 +#define PADDEDptr(x, y) unsigned y; x |
| 490 +#define PADDEDul(x, y) unsigned y; unsigned long x |
| 491 +#elif defined(__sparc__) /* big endian, 32 bits */ |
| 492 +#define PADDED(x, y) unsigned y; x |
| 493 +#define PADDEDptr(x, y) unsigned y; x |
| 494 +#define PADDEDul(x, y) unsigned y; unsigned long x |
| 495 +#elif defined(__hppa__) /* big endian, 32 bits */ |
| 496 +#define PADDED(x, y) unsigned y; x |
| 497 +#define PADDEDptr(x, y) unsigned y; x |
| 498 +#define PADDEDul(x, y) unsigned y; unsigned long x |
| 499 +#elif defined(__mips__) |
| 500 +# if defined (__MIPSEB__) /* big endian, 32 bits */ |
| 501 +#define PADDED(x, y) unsigned y; x |
| 502 +#define PADDEDptr(x, y) unsigned y; x |
| 503 +#define PADDEDul(x, y) unsigned y; unsigned long x |
| 504 +# elif defined(__MIPSEL__) /* little endian, 32 bits */ |
| 505 +#define PADDED(x, y) x; unsigned y |
| 506 +#define PADDEDptr(x, y) x; unsigned y |
| 507 +#define PADDEDul(x, y) unsigned long x; unsigned y |
| 508 +# else |
| 509 +# error "neither mipseb nor mipsel?" |
| 510 +# endif |
| 511 #else |
| 512 #error endian? |
| 513 #endif |
| 514 --- /dev/null |
| 515 +++ b/src/syscall-parisc.h |
| 516 @@ -0,0 +1,146 @@ |
| 517 +/* |
| 518 + * Linux system call numbers. |
| 519 + * |
| 520 + * Cary Coutant says that we should just use another syscall gateway |
| 521 + * page to avoid clashing with the HPUX space, and I think he's right: |
| 522 + * it will would keep a branch out of our syscall entry path, at the |
| 523 + * very least. If we decide to change it later, we can ``just'' tweak |
| 524 + * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be |
| 525 + * 1024 or something. Oh, and recompile libc. =) |
| 526 + * |
| 527 + * 64-bit HPUX binaries get the syscall gateway address passed in a register |
| 528 + * from the kernel at startup, which seems a sane strategy. |
| 529 + */ |
| 530 + |
| 531 +#define __NR_Linux 0 |
| 532 +#define __NR_io_setup (__NR_Linux + 215) |
| 533 +#define __NR_io_destroy (__NR_Linux + 216) |
| 534 +#define __NR_io_getevents (__NR_Linux + 217) |
| 535 +#define __NR_io_submit (__NR_Linux + 218) |
| 536 +#define __NR_io_cancel (__NR_Linux + 219) |
| 537 + |
| 538 +#define SYS_ify(syscall_name) __NR_##syscall_name |
| 539 + |
| 540 +/* Assume all syscalls are done from PIC code just to be |
| 541 + * safe. The worst case scenario is that you lose a register |
| 542 + * and save/restore r19 across the syscall. */ |
| 543 +#define PIC |
| 544 + |
| 545 +/* Definition taken from glibc 2.3.3 |
| 546 + * sysdeps/unix/sysv/linux/hppa/sysdep.h |
| 547 + */ |
| 548 + |
| 549 +#ifdef PIC |
| 550 +/* WARNING: CANNOT BE USED IN A NOP! */ |
| 551 +# define K_STW_ASM_PIC " copy %%r19, %%r4\n" |
| 552 +# define K_LDW_ASM_PIC " copy %%r4, %%r19\n" |
| 553 +# define K_USING_GR4 "%r4", |
| 554 +#else |
| 555 +# define K_STW_ASM_PIC " \n" |
| 556 +# define K_LDW_ASM_PIC " \n" |
| 557 +# define K_USING_GR4 |
| 558 +#endif |
| 559 + |
| 560 +/* GCC has to be warned that a syscall may clobber all the ABI |
| 561 + registers listed as "caller-saves", see page 8, Table 2 |
| 562 + in section 2.2.6 of the PA-RISC RUN-TIME architecture |
| 563 + document. However! r28 is the result and will conflict with |
| 564 + the clobber list so it is left out. Also the input arguments |
| 565 + registers r20 -> r26 will conflict with the list so they |
| 566 + are treated specially. Although r19 is clobbered by the syscall |
| 567 + we cannot say this because it would violate ABI, thus we say |
| 568 + r4 is clobbered and use that register to save/restore r19 |
| 569 + across the syscall. */ |
| 570 + |
| 571 +#define K_CALL_CLOB_REGS "%r1", "%r2", K_USING_GR4 \ |
| 572 + "%r20", "%r29", "%r31" |
| 573 + |
| 574 +#undef K_INLINE_SYSCALL |
| 575 +#define K_INLINE_SYSCALL(name, nr, args...) ({ \ |
| 576 + long __sys_res; \ |
| 577 + { \ |
| 578 + register unsigned long __res __asm__("r28"); \ |
| 579 + K_LOAD_ARGS_##nr(args) \ |
| 580 + /* FIXME: HACK stw/ldw r19 around syscall */ \ |
| 581 + __asm__ volatile( \ |
| 582 + K_STW_ASM_PIC \ |
| 583 + " ble 0x100(%%sr2, %%r0)\n" \ |
| 584 + " ldi %1, %%r20\n" \ |
| 585 + K_LDW_ASM_PIC \ |
| 586 + : "=r" (__res) \ |
| 587 + : "i" (SYS_ify(name)) K_ASM_ARGS_##nr \ |
| 588 + : "memory", K_CALL_CLOB_REGS K_CLOB_ARGS_##nr \ |
| 589 + ); \ |
| 590 + __sys_res = (long)__res; \ |
| 591 + } \ |
| 592 + __sys_res; \ |
| 593 +}) |
| 594 + |
| 595 +#define K_LOAD_ARGS_0() |
| 596 +#define K_LOAD_ARGS_1(r26) \ |
| 597 + register unsigned long __r26 __asm__("r26") = (unsigned long)(r26); \ |
| 598 + K_LOAD_ARGS_0() |
| 599 +#define K_LOAD_ARGS_2(r26,r25) \ |
| 600 + register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \ |
| 601 + K_LOAD_ARGS_1(r26) |
| 602 +#define K_LOAD_ARGS_3(r26,r25,r24) \ |
| 603 + register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \ |
| 604 + K_LOAD_ARGS_2(r26,r25) |
| 605 +#define K_LOAD_ARGS_4(r26,r25,r24,r23) \ |
| 606 + register unsigned long __r23 __asm__("r23") = (unsigned long)(r23); \ |
| 607 + K_LOAD_ARGS_3(r26,r25,r24) |
| 608 +#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \ |
| 609 + register unsigned long __r22 __asm__("r22") = (unsigned long)(r22); \ |
| 610 + K_LOAD_ARGS_4(r26,r25,r24,r23) |
| 611 +#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \ |
| 612 + register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \ |
| 613 + K_LOAD_ARGS_5(r26,r25,r24,r23,r22) |
| 614 + |
| 615 +/* Even with zero args we use r20 for the syscall number */ |
| 616 +#define K_ASM_ARGS_0 |
| 617 +#define K_ASM_ARGS_1 K_ASM_ARGS_0, "r" (__r26) |
| 618 +#define K_ASM_ARGS_2 K_ASM_ARGS_1, "r" (__r25) |
| 619 +#define K_ASM_ARGS_3 K_ASM_ARGS_2, "r" (__r24) |
| 620 +#define K_ASM_ARGS_4 K_ASM_ARGS_3, "r" (__r23) |
| 621 +#define K_ASM_ARGS_5 K_ASM_ARGS_4, "r" (__r22) |
| 622 +#define K_ASM_ARGS_6 K_ASM_ARGS_5, "r" (__r21) |
| 623 + |
| 624 +/* The registers not listed as inputs but clobbered */ |
| 625 +#define K_CLOB_ARGS_6 |
| 626 +#define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21" |
| 627 +#define K_CLOB_ARGS_4 K_CLOB_ARGS_5, "%r22" |
| 628 +#define K_CLOB_ARGS_3 K_CLOB_ARGS_4, "%r23" |
| 629 +#define K_CLOB_ARGS_2 K_CLOB_ARGS_3, "%r24" |
| 630 +#define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25" |
| 631 +#define K_CLOB_ARGS_0 K_CLOB_ARGS_1, "%r26" |
| 632 + |
| 633 +#define io_syscall1(type,fname,sname,type1,arg1) \ |
| 634 +type fname(type1 arg1) \ |
| 635 +{ \ |
| 636 + return K_INLINE_SYSCALL(sname, 1, arg1); \ |
| 637 +} |
| 638 + |
| 639 +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \ |
| 640 +type fname(type1 arg1, type2 arg2) \ |
| 641 +{ \ |
| 642 + return K_INLINE_SYSCALL(sname, 2, arg1, arg2); \ |
| 643 +} |
| 644 + |
| 645 +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \ |
| 646 +type fname(type1 arg1, type2 arg2, type3 arg3) \ |
| 647 +{ \ |
| 648 + return K_INLINE_SYSCALL(sname, 3, arg1, arg2, arg3); \ |
| 649 +} |
| 650 + |
| 651 +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg
4) \ |
| 652 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ |
| 653 +{ \ |
| 654 + return K_INLINE_SYSCALL(sname, 4, arg1, arg2, arg3, arg4); \ |
| 655 +} |
| 656 + |
| 657 +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg
4,type5,arg5) \ |
| 658 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ |
| 659 +{ \ |
| 660 + return K_INLINE_SYSCALL(sname, 5, arg1, arg2, arg3, arg4, arg5); \ |
| 661 +} |
| 662 + |
| 663 --- /dev/null |
| 664 +++ b/src/syscall-arm.h |
| 665 @@ -0,0 +1,116 @@ |
| 666 +/* |
| 667 + * linux/include/asm-arm/unistd.h |
| 668 + * |
| 669 + * Copyright (C) 2001-2005 Russell King |
| 670 + * |
| 671 + * This program is free software; you can redistribute it and/or modify |
| 672 + * it under the terms of the GNU General Public License version 2 as |
| 673 + * published by the Free Software Foundation. |
| 674 + * |
| 675 + * Please forward _all_ changes to this file to rmk@arm.linux.org.uk, |
| 676 + * no matter what the change is. Thanks! |
| 677 + */ |
| 678 + |
| 679 +#define __NR_OABI_SYSCALL_BASE 0x900000 |
| 680 + |
| 681 +#if defined(__thumb__) || defined(__ARM_EABI__) |
| 682 +#define __NR_SYSCALL_BASE 0 |
| 683 +#else |
| 684 +#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE |
| 685 +#endif |
| 686 + |
| 687 +#define __NR_io_setup (__NR_SYSCALL_BASE+243) |
| 688 +#define __NR_io_destroy (__NR_SYSCALL_BASE+244) |
| 689 +#define __NR_io_getevents (__NR_SYSCALL_BASE+245) |
| 690 +#define __NR_io_submit (__NR_SYSCALL_BASE+246) |
| 691 +#define __NR_io_cancel (__NR_SYSCALL_BASE+247) |
| 692 + |
| 693 +#define __sys2(x) #x |
| 694 +#define __sys1(x) __sys2(x) |
| 695 + |
| 696 +#if defined(__thumb__) || defined(__ARM_EABI__) |
| 697 +#define __SYS_REG(name) register long __sysreg __asm__("r7") = __NR_##name; |
| 698 +#define __SYS_REG_LIST(regs...) "r" (__sysreg) , ##regs |
| 699 +#define __syscall(name) "swi\t0" |
| 700 +#else |
| 701 +#define __SYS_REG(name) |
| 702 +#define __SYS_REG_LIST(regs...) regs |
| 703 +#define __syscall(name) "swi\t" __sys1(__NR_##name) "" |
| 704 +#endif |
| 705 + |
| 706 +#define io_syscall1(type,fname,sname,type1,arg1) \ |
| 707 +type fname(type1 arg1) { \ |
| 708 + __SYS_REG(sname) \ |
| 709 + register long __r0 __asm__("r0") = (long)arg1; \ |
| 710 + register long __res_r0 __asm__("r0");
\ |
| 711 + __asm__ __volatile__ ( \ |
| 712 + __syscall(sname) \ |
| 713 + : "=r" (__res_r0) \ |
| 714 + : __SYS_REG_LIST( "0" (__r0) ) \ |
| 715 + : "memory" ); \ |
| 716 + return (type) __res_r0; \ |
| 717 +} |
| 718 + |
| 719 +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \ |
| 720 +type fname(type1 arg1,type2 arg2) { \ |
| 721 + __SYS_REG(sname) \ |
| 722 + register long __r0 __asm__("r0") = (long)arg1; \ |
| 723 + register long __r1 __asm__("r1") = (long)arg2; \ |
| 724 + register long __res_r0 __asm__("r0");
\ |
| 725 + __asm__ __volatile__ ( \ |
| 726 + __syscall(sname) \ |
| 727 + : "=r" (__res_r0) \ |
| 728 + : __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) \ |
| 729 + : "memory" ); \ |
| 730 + return (type) __res_r0; \ |
| 731 +} |
| 732 + |
| 733 +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \ |
| 734 +type fname(type1 arg1,type2 arg2,type3 arg3) { \ |
| 735 + __SYS_REG(sname) \ |
| 736 + register long __r0 __asm__("r0") = (long)arg1; \ |
| 737 + register long __r1 __asm__("r1") = (long)arg2; \ |
| 738 + register long __r2 __asm__("r2") = (long)arg3; \ |
| 739 + register long __res_r0 __asm__("r0");
\ |
| 740 + __asm__ __volatile__ ( \ |
| 741 + __syscall(sname) \ |
| 742 + : "=r" (__res_r0) \ |
| 743 + : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) \ |
| 744 + : "memory" ); \ |
| 745 + return (type) __res_r0; \ |
| 746 +} |
| 747 + |
| 748 +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg
4)\ |
| 749 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \ |
| 750 + __SYS_REG(sname) \ |
| 751 + register long __r0 __asm__("r0") = (long)arg1; \ |
| 752 + register long __r1 __asm__("r1") = (long)arg2; \ |
| 753 + register long __r2 __asm__("r2") = (long)arg3; \ |
| 754 + register long __r3 __asm__("r3") = (long)arg4; \ |
| 755 + register long __res_r0 __asm__("r0");
\ |
| 756 + __asm__ __volatile__ ( \ |
| 757 + __syscall(sname) \ |
| 758 + : "=r" (__res_r0) \ |
| 759 + : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) \ |
| 760 + : "memory" ); \ |
| 761 + return (type) __res_r0; \ |
| 762 +} |
| 763 + |
| 764 +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg
4,type5,arg5) \ |
| 765 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) {\ |
| 766 + __SYS_REG(sname) \ |
| 767 + register long __r0 __asm__("r0") = (long)arg1; \ |
| 768 + register long __r1 __asm__("r1") = (long)arg2; \ |
| 769 + register long __r2 __asm__("r2") = (long)arg3; \ |
| 770 + register long __r3 __asm__("r3") = (long)arg4; \ |
| 771 + register long __r4 __asm__("r4") = (long)arg5; \ |
| 772 + register long __res_r0 __asm__("r0");
\ |
| 773 + __asm__ __volatile__ ( \ |
| 774 + __syscall(sname) \ |
| 775 + : "=r" (__res_r0) \ |
| 776 + : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \ |
| 777 + "r" (__r3), "r" (__r4) ) \ |
| 778 + : "memory" ); \ |
| 779 + return (type) __res_r0; \ |
| 780 +} |
| 781 + |
| 782 --- a/harness/main.c |
| 783 +++ b/harness/main.c |
| 784 @@ -11,8 +11,14 @@ |
| 785 |
| 786 #include <libaio.h> |
| 787 |
| 788 -#if defined(__i386__) |
| 789 +#if defined(__i386__) || defined(__powerpc__) || defined(__mips__) |
| 790 #define KERNEL_RW_POINTER ((void *)0xc0010000) |
| 791 +#elif defined(__arm__) || defined(__m68k__) || defined(__s390__) |
| 792 +#define KERNEL_RW_POINTER ((void *)0x00010000) |
| 793 +#elif defined(__hppa__) |
| 794 +#define KERNEL_RW_POINTER ((void *)0x10100000) |
| 795 +#elif defined(__sparc__) && !defined(__arch64__) |
| 796 +#define KERNEL_RW_POINTER ((void *)0xf0010000) |
| 797 #else |
| 798 //#warning Not really sure where kernel memory is. Guessing. |
| 799 #define KERNEL_RW_POINTER ((void *)0xffffffffc0010000) |
| OLD | NEW |
|---|
Chromium Code Reviews
Issue 652091:
Make libaio work for ARM -- pull patches from debian. (Closed)
