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Side by Side Diff: src/arm/assembler-arm.h

Issue 6461017: ARM: Add type-feedback recording for compare... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 9 years, 10 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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722 void tst(Register src1, Register src2, Condition cond = al) { 722 void tst(Register src1, Register src2, Condition cond = al) {
723 tst(src1, Operand(src2), cond); 723 tst(src1, Operand(src2), cond);
724 } 724 }
725 725
726 void teq(Register src1, const Operand& src2, Condition cond = al); 726 void teq(Register src1, const Operand& src2, Condition cond = al);
727 727
728 void cmp(Register src1, const Operand& src2, Condition cond = al); 728 void cmp(Register src1, const Operand& src2, Condition cond = al);
729 void cmp(Register src1, Register src2, Condition cond = al) { 729 void cmp(Register src1, Register src2, Condition cond = al) {
730 cmp(src1, Operand(src2), cond); 730 cmp(src1, Operand(src2), cond);
731 } 731 }
732 void cmp_raw_immediate(Register src1, int raw_immediate, Condition cond = al);
732 733
733 void cmn(Register src1, const Operand& src2, Condition cond = al); 734 void cmn(Register src1, const Operand& src2, Condition cond = al);
734 735
735 void orr(Register dst, Register src1, const Operand& src2, 736 void orr(Register dst, Register src1, const Operand& src2,
736 SBit s = LeaveCC, Condition cond = al); 737 SBit s = LeaveCC, Condition cond = al);
737 void orr(Register dst, Register src1, Register src2, 738 void orr(Register dst, Register src1, Register src2,
738 SBit s = LeaveCC, Condition cond = al) { 739 SBit s = LeaveCC, Condition cond = al) {
739 orr(dst, src1, Operand(src2), s, cond); 740 orr(dst, src1, Operand(src2), s, cond);
740 } 741 }
741 742
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1092 if (!allow_peephole_optimization_) return false; 1093 if (!allow_peephole_optimization_) return false;
1093 if (last_bound_pos_ > pc_offset() - instructions * kInstrSize) return false; 1094 if (last_bound_pos_ > pc_offset() - instructions * kInstrSize) return false;
1094 return reloc_info_writer.last_pc() <= pc_ - instructions * kInstrSize; 1095 return reloc_info_writer.last_pc() <= pc_ - instructions * kInstrSize;
1095 } 1096 }
1096 1097
1097 // Read/patch instructions 1098 // Read/patch instructions
1098 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } 1099 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); }
1099 static void instr_at_put(byte* pc, Instr instr) { 1100 static void instr_at_put(byte* pc, Instr instr) {
1100 *reinterpret_cast<Instr*>(pc) = instr; 1101 *reinterpret_cast<Instr*>(pc) = instr;
1101 } 1102 }
1103 static Condition GetCondition(Instr instr);
1102 static bool IsBranch(Instr instr); 1104 static bool IsBranch(Instr instr);
1103 static int GetBranchOffset(Instr instr); 1105 static int GetBranchOffset(Instr instr);
1104 static bool IsLdrRegisterImmediate(Instr instr); 1106 static bool IsLdrRegisterImmediate(Instr instr);
1105 static int GetLdrRegisterImmediateOffset(Instr instr); 1107 static int GetLdrRegisterImmediateOffset(Instr instr);
1106 static Instr SetLdrRegisterImmediateOffset(Instr instr, int offset); 1108 static Instr SetLdrRegisterImmediateOffset(Instr instr, int offset);
1107 static bool IsStrRegisterImmediate(Instr instr); 1109 static bool IsStrRegisterImmediate(Instr instr);
1108 static Instr SetStrRegisterImmediateOffset(Instr instr, int offset); 1110 static Instr SetStrRegisterImmediateOffset(Instr instr, int offset);
1109 static bool IsAddRegisterImmediate(Instr instr); 1111 static bool IsAddRegisterImmediate(Instr instr);
1110 static Instr SetAddRegisterImmediateOffset(Instr instr, int offset); 1112 static Instr SetAddRegisterImmediateOffset(Instr instr, int offset);
1111 static Register GetRd(Instr instr); 1113 static Register GetRd(Instr instr);
1114 static Register GetRn(Instr instr);
1115 static Register GetRm(Instr instr);
1112 static bool IsPush(Instr instr); 1116 static bool IsPush(Instr instr);
1113 static bool IsPop(Instr instr); 1117 static bool IsPop(Instr instr);
1114 static bool IsStrRegFpOffset(Instr instr); 1118 static bool IsStrRegFpOffset(Instr instr);
1115 static bool IsLdrRegFpOffset(Instr instr); 1119 static bool IsLdrRegFpOffset(Instr instr);
1116 static bool IsStrRegFpNegOffset(Instr instr); 1120 static bool IsStrRegFpNegOffset(Instr instr);
1117 static bool IsLdrRegFpNegOffset(Instr instr); 1121 static bool IsLdrRegFpNegOffset(Instr instr);
1118 static bool IsLdrPcImmediateOffset(Instr instr); 1122 static bool IsLdrPcImmediateOffset(Instr instr);
1123 static bool IsTstImmediate(Instr instr);
1124 static bool IsCmpRegister(Instr instr);
1125 static bool IsCmpImmediate(Instr instr);
1126 static Register GetCmpImmediateRegister(Instr instr);
1127 static int GetCmpImmediateRawImmediate(Instr instr);
1119 static bool IsNop(Instr instr, int type = NON_MARKING_NOP); 1128 static bool IsNop(Instr instr, int type = NON_MARKING_NOP);
1120 1129
1121 // Check if is time to emit a constant pool for pending reloc info entries 1130 // Check if is time to emit a constant pool for pending reloc info entries
1122 void CheckConstPool(bool force_emit, bool require_jump); 1131 void CheckConstPool(bool force_emit, bool require_jump);
1123 1132
1124 protected: 1133 protected:
1125 int buffer_space() const { return reloc_info_writer.pos() - pc_; } 1134 int buffer_space() const { return reloc_info_writer.pos() - pc_; }
1126 1135
1127 // Read/patch instructions 1136 // Read/patch instructions
1128 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } 1137 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); }
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1259 public: 1268 public:
1260 explicit EnsureSpace(Assembler* assembler) { 1269 explicit EnsureSpace(Assembler* assembler) {
1261 assembler->CheckBuffer(); 1270 assembler->CheckBuffer();
1262 } 1271 }
1263 }; 1272 };
1264 1273
1265 1274
1266 } } // namespace v8::internal 1275 } } // namespace v8::internal
1267 1276
1268 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1277 #endif // V8_ARM_ASSEMBLER_ARM_H_
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